非晶矽薄膜電晶體之研製

Abstract

由本研究群自行設計之電漿輔助化學氣相沉積系統，成功地以攝氏溫度250℃∼350℃之沉積溫度製成高性能非晶矽薄膜電晶體，我們藉由分解矽烷與氨氣混合物沉積氮化矽膜，由於沉積過程中配以氫氣處理故所得薄膜為高品質氮化矽。於所沉積之氫化非晶矽薄膜厚度（4500埃）足以抵檔來自外界之破壞，因此我們所製成之元件可免去另外沉積一層鈍化膜，如此可以簡化整個製程。元件退火處理將可得到不同之效果，我們發現以180℃為最佳之退火溫度而在退火過程中加10%氫氣於氮氣裡來降低fast state之密度，而事實上經過退火處理之後，元件之臨限電壓明顯地下降，證明fast state為主宰元件不穩定之機構。由實驗得知，我們所製之反疊差型薄膜電晶體有較低之臨限壓（2.73∼4.68volt），次臨限擺幅（0.481∼ 0.836v/decade）及較高之開關電流比（1E07∼1E08），場效遷移率（0.644∼1.27cm2/v.sec）， Ion/w比（5.70E-2∼9.75E-2A/m），這些數據都足以因應液晶顯示器應用之需求。

Thin film transistors with high performce at low deposition temperature in the range of 250℃∼350℃ were successfully fabricated. Our silicon nitride film was deposited by decomposing silane and ammonia mixture. Due to the introduction of hydrogen gas, the silicon nitride is of high film quality with dielectric constant 4.6∼5.09, refractive index 1.73∼1.88. The thickness of a-Si: H(4500 A) is thick enough to avoid the external damage, thus our devices are free from making passivation layer to simplify the fabrication process. Annealing the devices in different temperatures will show different results. Accoding to our investigation, 180℃ is the optimal annealing temperature to enhance the performance of pesent devices. During the annealing process, we used 10% H2 in 90% N2 as the forming gas was used. It introduces H atoms to the a-Si :H/SiNX interface and reduce the density of fast states. Indeed, we observed that after PMA, the threshold voltage shifts to a smaller value, thus is can be sure that the instability mechanism of presnet devices is dominated by the fast state creation. Finally, good performance of inverted staggered a-Si:H TFT's was obtained, they have threshold voltages of 2.73∼4.68 volt, ON/OFF current ratio is nearly to seven orders, filed effect mobility of 0.644∼1.27cm2/v.s, subthreshold swing about 0.481∼0.836V/decade, and IoN/W ratio of 5.7×10-2A/m which are suitable for the application in active matrix liquid crystal displays (LCD).