標題: 深次微米互補金氧半元件所需超薄閘極介電質層可靠度之研究
A Study on Reliability of Ultrathin Gate Dielectrics for Deep- Submicron CMOS Technology
作者: 郝中蓬
Chung-Peng Hao
張俊彥
Chun-Yen Chang
電子研究所
關鍵字: 深次微米; 互補金氧半; 超薄閘極介電質層; 可靠度;Deep-submicron; CMOS; ultrathin gate dielectrics; reliability
公開日期: 1994
摘要: 當元件尺寸縮小時, 為了減低短通道效應,改善速度, 並提高電流驅動 力, 則閘極介電質層的厚度必須減小.然而, 減小閘極介電質層的厚度會 導致可靠度的退化. 因此,對薄的閘極介電質層而言, 可靠度實為一重要 課題.我們已經發展出40~O 高品質的閘極氧化層.在40~O 快速加熱氧化層 方面, 準崩潰電荷為 +1105C/cm^2 (基板注入)和-2.62C/cm^2 (閘極注 入) ,而崩潰電場為 15MV/cm. 另一方面,40~O 爐管稀釋氧化層其準崩潰 電荷也可達到 +626C/cm^2 (基板注入), -8.1C/cm^2 (閘極注入), 和 16MV/cm的崩潰電場.此外, 準崩潰現象, 氧化層厚度效應, 高溫可靠度, 不同應力電流關係, 也一併探討.在P+ 型複晶矽閘極P 型金氧半元件的硼 穿透, 可藉由氮的共同佈植來壓制. 最佳的氮佈植塵量約在1x10^15 cm^-2.氮佈植後的驅入循環,可提高製程的廣度. 又經由傅利葉轉換紅外 線頻譜分析, 找到硼-氮複合物的存在證據, 並提出一個有關壓制硼穿透 的機構. As the device dimensions scaled down, the thickness of gate dielectrics must decrease in order to suppress short-channel effects, improve device speed, and increase current drivability. However, the decreasing of gate dielectrics can lead to an intolerable degradation in reliability. Hence, the reliability of ultrathin gate dielectrics is an important issue for deep- submicron CMOS technology. In this thesis, we have developed 40~O-thick, high quality gate oxides. For the 40~O- thick rapid thermal O2 oxide, the charge-to-quasi-breakdown are +1105C/cm^2 (substrate-injection) and -2.62C/cm^2 (gate- injection), the breakdown field is 15MV/cm. On the other hand, the 40~O-thick furnace diluted O2 oxide, the charge-to-quasi- breakdown and breakdown field are +626C/cm^2 ( substrate- injection), -8.1C/cm^2 (gate-injection), and 16MV/cm. Also, the quasi-breakdown phenomenon, oxide thickness effects, high temperature reliability, and various stress current dependence are studied. The suppression of boron penetration in P+ poly gate PMOS device are investigated by nitrogen co-implant. An optimum implant dosage of nitrogen is around 1x10^15 cm^-2.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT830430087
http://hdl.handle.net/11536/59278
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