以FPGA設計具平行運算能力的CMAC控制器

Abstract

本論文的目的，在於以FPGA設計具平行運算能力的CMAC控制器，並將此 CMAC類神經網路控制器與PD控制器結合，形成CMAC控制系統，用以改善傳 統PD控制器於非線性系統的控制精度。 在本論文中我們利用SIMD計算架 構及FPGA電路設計來解決CMAC類神經網路記憶體並取的瓶頸，讓CMAC控制 器有能力一次從記憶體中讀取或寫入兩筆資料。首先，我們將D.Ellison 所提出的產生演算法轉成實際電路，並訂定其規格，以做為電路設計的依 據。接著，我們以3顆Xilinx公司的FPGA晶片及6顆32K×8的靜態記憶體來 實現具平行運算能力的CMAC類神經網路控制器，其中FPGA負責CMAC類神經 網路的計算架構，而靜態記憶體則負責儲存神經元連結量(weight)。其次 ，我們以8051單晶片實現PD控制器，再輔以數位/類比轉換器(AD7541A)將 數位輸出訊號轉成類比電壓訊號，及16位元的解碼/計數器(HCTL-2016)將 馬達位置回授至8051單晶片，架構成完整的CMAC控制系統。最後，將CMAC 控制系統應用於直流馬達，以驗證我們所設計的CMAC控制系統。 The object of this thesis is to build the CMAC controller with parallel computing capability via FPGA chip. This CMAC control system combines parallelly the tranditional PD controller and the CMAC contoller. We use the CMAC controller to improve existing nonlinear control systems. In this paper, we use SIMD computation architecture and the FPGA chips to solve the problem in the simultaneous fetch and store of the data.The CMAC controller designed has the ability to fetch or store two data simultaneously. First, we transform the generalition algorithm proposed by D.Ellision into physical circuits. We also determine the specifications and parameters the circuits. Then we implement CMAC by three FPGA chips and six 32k×8 SRAMs. The FPGA chips are for the computation of the CMAC neural network. The SRAMs store the weights of the CMAC neural network. Secondly, we implement the PD controller by 8051 single-chip computer. Then, we integrate the PD controller,the CMAC controller,the HCTL-2016 and the AD7541A to construct the overall CMAC control system. Finally, we apply the CMAC control system to control the DC servomotor to verify our hardware and software design .