標題: 先進矽化鈦技術在超大型積體電路上之應用
Advanced Titanium Silicidation Technology for ULSI Applications
作者: 黃正同
Huang, Cheng Tung
雷添福
Tan Fu Lei
電子研究所
關鍵字: 淺接面;鍺佈植;複晶矽;薄氧化層;氮佈植;Shallow junction;Ge+ implantation;poly-Si;Thin oxide;N+ implantation
公開日期: 1996
摘要: 本論文研究的主旨在於利用鍺或是氮離子佈植的關鍵技術來探討矽化鈦形 成時對於淺接面以及閘極氧化層所造成的影響在實驗中我們首先提出了鍺 離子佈植對於矽化鈦之p+/n淺接面的探討並變化了不同製程和參數以期能 淂到良好特性之淺接面本研究中我們將鍺離子佈植入矽基板所造成的缺陷 可經由矽化鈦轉化過程中有效消除在另一方面當鍺離子佈植入矽化鈦中將 有效地抑制高溫矽化鈦轉化時鈦原子由高溫退火的穿透效應此外解決長久 以來硼原子易與鈦形成化合物的問題而使硼原子能有效地擴散至矽基板並 且在電性上有大幅的改善至0.5 nA/cm2以下從二次離子質量分析(SIMS)清 楚顯示此接面深度為40nm依據上方述方法利用鍺離子佈植入矽化鈦中雖能 改善二極體的特性然而並未能改善矽化鈦形成而下沉消耗矽基板造成接觸 電阻增加等缺點為了解決此一缺我們發展利用一層複晶矽形或非複晶矽做 為緩衝層並且再施於鍺佈植後同樣地獲淂一個低漏電的二極體(小於0.5 nA/cm2)以及一個40nm的超淺接面許多文獻已討論過矽化鈦形成時將會使 閘極的特性劣化起因於鈦原子經高溫退火處理後會經由複晶矽穿透至閘極 我們將歸於矽化鈦的熱穩定性不佳所引起的藉由氮離子佈植以及高溫退火 處理後的聚集現象我們應用氮離子佈植方法以期改善此聚集現象並研究改 善後的矽化鈦形成對於閘極的影響於是設計許多不同實驗順序以及改變氮 離子佈植的參數很顯然地一個最佳化的氮佈植條件將有效地改善此矽化鈦 在閘極上形成的造成的影響對於整體的良率顯著提升至11 MV/cm。 Studies of the properties and characteristics of titanium silicide has been stimulated. This thesis consists of two parts which cover the impact of TiSi2 formation on the shallow junctions and the thin gate oxide. It was obsvered that the electrical characteristics of Ge-preamorphized p+/n junctions were significantly improved after the formation ofTi silicide. The phenomena can be explained annihilation of deeper end-of- range implantation damage during the silicidation process. The advanced study of ultra-shallow p+/n junctions formed byimplanting a 60 KeV Ge+ into a TiSi2 layer have been also proposed. A very low reverse leakage current density (0.5 nA/cm2 at -5 V) and a very good forward ideality factor,(about 1.001) were achievedin these ultra-shallow p+/n junctions. From the secondary ion mass spectrometry (SIMS) analysis, the junction depth were measured to be 60 nm and the surface concentration was about 3 times higher thanthat of the conventional samples. Based on the above, a further technologyfor forming a titanium- silicided shallow junction by combining germanium implantation with an amorphous-Si (or a poly-Si) buffer layer has been proposed for MOSFETs. Theuse of a buffer layer between Ti and Si can avoid the consumption of bulk-Si and the recession of TiSi2 film into the source/drain junctions during the silicidationprocess. Since the pentration of titanium atoms was suppressed due to the Ge-implantation,the periphery leakage and the generation leakage was improved and TiSi2/Si interfaceswere even smooth. A very low leakage current (0.192 nA/cm2 at -5 V) and a junctiondepth (40 nm) were obtained. Furthermore, the effect of the titanium-silicide processon the thin gate oxide in p+ poly-Si gate MOS devices has been described. The degradation of conventional Ti-salicide gate is shown to be strongly correlated to the diffusion of Ti atoms during the silicidation process. The implantation of nitrogen was applied to investigate performance of Ti-salicide gate. It was observed that the integrity of Ti-salicide gate can be effectively improved by an optimum nitrogen implantation. The technique enables productions of breakdown field witha fairly narrow distribution (about 12 MV/cm) and a low leakage current.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT850428006
http://hdl.handle.net/11536/61869
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