標題: | 場效激發元件驅動器的設計 The design of the FED driver |
作者: | 魯得中 Luu, Der-Chung 羅正忠 Lou Jen-Chung 電子研究所 |
關鍵字: | 驅動器;場效激發;設計;場激發;driver;FED;design |
公開日期: | 1996 |
摘要: | 場效激發元件(FED)未來運用在平板顯示器上的前途不可限量.由於它 的色澤與視角都比一般液晶顯示器好很多,再加上控制方式簡單,所以是一 個非常具有潛力的顯示器元件.當閘極加上80伏特的驅動電壓,同時在陰極 加上-19伏到5伏的可變電壓去改變射出電子的數量,這樣就可以控制明暗 的變化. 本論文 主要是設計控制陰極的驅動電路.從資料匯流排送出串列的(In series)數 位資料後,此驅動器將這些資料轉換成並列的(In parallel)數位資料.經 過數位的轉換變成類比的資料後, 透過運算放大器所椄成的負迴授電路形 成一個類比式的緩衝器,可直接驅動場效激發元件的陰極部份. 這個晶片能驅動60個輸出,並且在大的顯示器上容易擴充.本論文是以5.0 微米的設計規格,並利用數位與類比式混合電路來從事研究.在晶片設計中 所選用的保護電路,佈局位置等,都直接影響電路本身的特性,本論文是以 電路模擬為主,並試圖找出最佳的電路特性結果. The FED shows a lot of potential applications in the flat panel displayindustry in the future.Its color and viewing angle are more excellent than theLCD display.Furthermore,its operation mode is easily controlled,therefore, theFED is a very promising flat panel display. As the gate is applied with a biasof 80 Volts, and the cathode is biased from -19V to 5V to change amount of theemitted electrons at the same time , the variation of luminosity is then con-trolled. This thesis mainly describes the design of a driver circuit controllingthe FED cathode.After the data bus sends a serial digital data,the driver willtransfer them to the parallel digital data . As a result of converting digitalto analog data , the driver uses OP-AMP which is a negative feedback structureforming an analog buffer,and to driver the FED cathode directly. This chip can drive 60 outputs , and it is expandable easily in large-sized display . In this study , a 5.0 um design rule is applied to design thedigital and analog mixed mode circuit . It is found that the protectivecircuits,layouts and pad circuits,etc, show significant effects on the circuitperformance.The main purpose of this thesis is to study the circuit simulationto get the optimal performance for driver circuits. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT850428017 http://hdl.handle.net/11536/61881 |
Appears in Collections: | Thesis |