無電鍍沉積薄膜應用於銲錫擴散阻障層之研究

Abstract

本研究以無電鍍與焊錫擴散鍵結等兩種製程，取代深次微米半導體金屬墊層(UBM)元件物理氣相沉積製程(PVD)階梯覆蓋性不佳的現象，使金屬墊層(UBM)仍具良好的元件鍵結附著力，並兼具擴散阻障、潤濕及保護作用，可達覆晶構裝低成本、高密度與優良電性的需求。 本研究進行無電鍍製程沉積實驗，其等向沉積成長元件之金屬墊層，可解決元件鍍膜階梯覆蓋性不佳的問題。首先在氮化鋁基板上製作無電鍍鎳/銅雙層線路及凸塊，由元素線掃描結果顯示，錫無法突破鎳層之阻絕，證實鎳層是一良好的擴散阻絕層；其次，本實驗以無電電鍍沉積技術（Electroless Plating）在矽晶基板上製作無電電鍍鈷磷（Co-P）合金薄膜，再以電鍍方式沉積錫鉛（Pb-Sn）銲料於其上，用以探討無電鍍鈷磷薄膜做為銅製程覆晶接合（Flip-chip Bonding，FC）凸塊底部金屬化（Under Bump Metallurgy，UBM）之應用可行性。X光繞射（X-ray Diffraction，XRD）顯示無電鍍鈷膜主要應由非結晶與微晶（microcrystalline）混合組成。元素線掃描分析結果顯示，在錫、銅及鈷之相互擴散反應過程中，當做為潤濕層的銅被完全消耗掉之後，錫仍只在鈷磷鍍層與銲錫的界面處；經250□C、24小時之熱處理後，錫無法穿透鈷磷層的阻擋，而底層的銅亦無法擴散至銲錫層中，證實無電鍍鈷磷層可同時做為銅導線與銲錫凸塊之擴散阻障層（Diffusion Barrier），而其阻擋能力主要由高磷含量之初鍍鈷層形成之非晶質結構所提供。進行無電鍍鎳、銅與氮化鋁基板之拉桿黏著強度試驗，顯示鎳和銅之間黏著力亦大於761 kg/cm2，皆符合電路元件之黏著強度之要求。以無電電鍍搭配微影成像及蝕刻技術，在基板上製作無電鍍鎳或鈷/銅雙層線路及凸塊；另藉由電鍍方法沉積錫鉛於無電鍍鎳/銅上，用以模擬鎳銅凸塊與銲錫球產生之界面反應，無電鍍法所沉積的鎳磷(Ni(P))與鈷磷（Co(P)）薄膜具有良好階梯覆蓋性，可同時做為銅製程之銅導線與銲錫凸塊之擴散阻障層，此Ni或Co層阻擋能力主要由高磷含量之鈷層形成之非晶質結構所提供。 本研究另提出擴散接合的製程，乃一種低溫金屬銲錫擴散鍵結的構裝接合技術，這篇論文便研此新穎的構裝接合技術。將多層薄膜Cu/Ti/Si 與Au/Cu/Al2O3在攝氏250度至400度間以焊錫鍵結，實驗研究結果顯示在結合界面將產生金屬界面化合物η-(Cu0.99Au0.01)6Sn5與δ-(Au0.87Cu0.13)Sn，此金屬界面化合物的成長受限於擴散控制，可減少焊接的缺陷產生(如凝結裂縫或氣孔等)，而且期抗拉強度可達132 kg/cm2 ，達無鉛構裝產業應用價值。 依據這些實驗結果顯示無電鍍與焊錫擴散接合法確實是光電半導體覆晶金屬墊層可應用的優良技術。

Under bump metallization (UBM) provides good adhesion between the bonding pads and the bumps, and serves as a diffusion barrier, wetting, and protective layer for flip-chip bonding. Both Au and Cu are so-called fast diffusers in Sn, and can diffuse very long distances in Sn in a relatively short time.. All of UBM metals are in general deposited by physical vapor deposition (PVD). However, as being used in the recent deep sub-micron Cu-IC process, the PVD suffers from poor step coverage. Numerous efforts have been made to solve this difficulty. To solve the step coverage problems, a new idea was provided that the diffusion barrier layer in the Cu-IC process can be formed by using an electroless plating method. At first, the application of electroless copper/nickel (Cu/Ni) films on aluminum nitride (AlN) substrates was explored. The Ni film remained a mixture of amorphous and microcrystalline structures, and the Cu film was polycrystalline. Subsequent Pb-Sn solder bumping experiments indicated the amorphous Ni(P) film was a good diffusion barrier layer since Sn could not diffuse through it. The electroless Ni(P) layer has a step coverage and simultaneously serve as a diffusion barrier of Cu interconnects and UBM structure of flip-chip Cu-ICs. Pull-off tests revealed that the Cu/Ni films strongly adhered on both types of AlN substrates and that the adhesion strength exceeded 761 kg/cm2. Next, electroless plating technique was utilized to prepare the cobalt-phosphorous Co(P) thin film to serve as the diffusion barrier layer of lead-tin solder. The x-ray diffraction (XRD) in conjunction with composition analyses revealed that the electroless Co(P) layer was a mixture of amorphous and nanocrystalline structures. The fact that Sn and Cu underlayer could not penetrate Co layer after such a liquid-state annealing evidenced that the Co(P) layer may simultaneously serve as a diffusion barrier interlayer dielectrics and UBM for flip chip copper (Cu) ICs. The multi-layer thin-film systems of Cu/Ti/Si and Au/Cu/Al2O3 were diffusion-soldered at temperatures between 250°C and 400°C by inserting an Sn thin-film interlayer. Experimental results showed that a double layer of intermetallic compounds η-(Cu0.99Au0.01)6Sn5/δ-(Au0.87Cu0.13)Sn were formed at the interface. Kinetics analyses reveal that the growth of intermetallics was diffusion-controlled. The activation energies as calculated from Arrhenius plots of the growth rate constants for (Cu0.99Au0.01)6Sn5 and (Au0.87Cu0.13)Sn are 16.9 kJ/mol and 53.7 kJ/mol, respectively. The satisfactory tensile strength of 132 kg/cm2 could be attained under the diffusion bonding condition of 300°C for 20 min for Cu/Ti/Si and Au/Cu/Al2O3. Results in these experiments demonstrate that electroless plating and diffusion soldering are indeed excellent technology for UBM structure of flip-chip ICs.