標題: | 非揮發性記憶體之低功率消耗及低工作電壓之感測放大器 A Novel Sense Amplifier for low power consumption/low power supply used in Non-Volatile Memory |
作者: | 王清煌 蘇朝琴 郭浩中 Dr. Chao-Chin Su Dr. Hao-Chung Kuo 電機學院電子與光電學程 |
關鍵字: | 感測放大器;存取速度;快閃記憶體;低功率消耗;sense amplifier;access speed;flash memory;low power consumption |
公開日期: | 2006 |
摘要: | 本論文提出一個新的感測放大器和一個新的感測方法來感測的快閃記憶體存放內容,藉由新的資料線預充方法,本文所提出的感測放大器能達到低功率消耗且能在低供應電源下(小於1伏特)正常工作,讀取快閃記憶體存放內容。
本文所提出的感測放大器在0.25微米及0.18微米的快閃記憶體製程下,已經獲得充分的驗證,並已經應用在量產產品上面,而且從晶片的特性分析得到很好的實驗結果。
根據模擬結果,在0.18微米的製程下,操作電壓2伏特,1兆赫兹工頻率下, 每個感測放大器所消耗的功率約3.7微安。存取速度方面,在操作電壓1.6伏特, 工作溫度攝氏125度, 感測放大器的讀取速度約40奈秒。與傳統感測放大器相較下,功率消耗大幅下降(每個感測放大器約80%)且不犧牲讀取速度。 ABSTRACT This paper presents a novel sense amplifier that uses a novel bit line pre-charge scheme and flash cell’s data content sensing scheme to meet lower power dissipation and for lower power supply (~ 1v) application without access speed degradation. The proposed sense amplifier is well proven in 0.25um and 0.18um flash memory (Silicon Storage Tech., SST). And gets a good performance (lower power dissipation than conventional sense amplifier) from silicon characterization. For 0.18um, the simulation result for the power dissipation is as low as 3.7uA (under 2.0v, FF corner, 1M Hertz) per sense amplifier. And the access speed is less than 40ns under worst case (1.6v, 85C, SS process corner). Based on silicon’s characterization result, the access time is faster than 20ns under typical condition and the power consumption is around 100 uA under 1M Hz, typical condition. (Whole chip that includes address buffer and output buffer) |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009167520 http://hdl.handle.net/11536/63458 |
Appears in Collections: | Thesis |
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