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dc.contributor.authorLin, Kung-Liangen_US
dc.contributor.authorChang, Edward-Yien_US
dc.contributor.authorShih, Lin-Chien_US
dc.date.accessioned2014-12-08T15:08:10Z-
dc.date.available2014-12-08T15:08:10Z-
dc.date.issued2009-12-01en_US
dc.identifier.issn0167-9317en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.mee.2009.04.027en_US
dc.identifier.urihttp://hdl.handle.net/11536/6376-
dc.description.abstractLow cost electroplated Cu-bump with environmental friendly Sn solder was developed for flip-chip applications. The seed layer used was Ti/WN(x)/Ti/Cu where WN(x) was used as the Cu diffusion barrier and Ti was used to enhance the adhesion between bump and the chip pad. Thick negative photoresist (THB JSR-151N) with a high aspect ratio of 2.4 was used for electroplating of copper bump and Sn solder. The Sn solder cap was reflowed at 225 degrees for 6 min at N(2) atmosphere. No wetting phenomenon was observed for the Sn solder as evaluated by energy-dispersed spectroscopy (EDS). The Cu-bump with Ti/WN(x)/Ti/Cu seed layer not only have higher shear force than the Cu-bump with Ti/Cu seed layer but also has higher resistance to fatigue failure than the Au, SnCu, SnAg bumps. (C) 2009 Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectCopper bumpen_US
dc.subjectLead-freeen_US
dc.subjectElectroplatingen_US
dc.titleEvaluation of Cu-bumps with lead-free solders for flip-chip package applicationsen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.mee.2009.04.027en_US
dc.identifier.journalMICROELECTRONIC ENGINEERINGen_US
dc.citation.volume86en_US
dc.citation.issue12en_US
dc.citation.spage2392en_US
dc.citation.epage2395en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000271846900005-
dc.citation.woscount10-
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