完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 楊明瑞 | en_US |
dc.contributor.author | Ming-Rang Yang | en_US |
dc.contributor.author | 黃調元 | en_US |
dc.contributor.author | Dr. Tiao-Yuan Huang | en_US |
dc.date.accessioned | 2014-12-12T02:20:46Z | - |
dc.date.available | 2014-12-12T02:20:46Z | - |
dc.date.issued | 1998 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#NT870428047 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/64331 | - |
dc.description.abstract | 在本論文中 , 以低溫複晶矽薄膜電晶體之氨氣(NH3)和笑氣(N2O)電漿鈍化效應和其可靠度分析為研究主題。研究發現相較於經過笑氣(N2O)電漿處理之元件氨氣(NH3)電漿處理有較佳的電性 , 而相較於以乙矽烷(Si2H6)沉積製成之低溫複晶矽薄膜電晶體 , 笑氣(N2O)電漿處理對於甲矽烷(SiH4)沉積製成之低溫複晶矽薄膜電晶體有較高的效率。在電漿處理前 , 相較於製作於矽基板上的元件 , 製作在石英基板上的元件雖然最初展現較差的電性 , 然而卻展現較高的電漿鈍化效率。製作於矽基板上的元件在電漿處理時間超過某一時間後會有較高的漏電流 , 此乃因電漿活性子會堆積在背面通道的界面。上述的現象將會以電漿鈍化的機制來解釋。 各種的電漿處理後的元件 , 在各種加壓測試條件下其特性都會隨著加壓測試時間的改變而衰退 , 但其衰退的程度和趨勢卻不盡相同。不穩定的機制將隨後被提出。我們發現產生於主動區內部和氧化層與複晶矽界面的能態和電荷被補捉在氧化層中為元件特性衰退的主因。而元件內部電場和基板的熱傳導能力為不穩定機制中的兩樣因素。 | zh_TW |
dc.description.abstract | In this thesis, NH3 and N2O plasma passivation effects on low temperature polysilicon TFTs and reliability of plasma-passivated low temperature polysilicon TFTs are investigated. It is found that the NH3 plasma-treated devices exhibit superior electrical characteristics than the N2O plasma-treated ones. In addition, N2O plasma passivation has higher efficiency in SiH4-depositied polysilicon films than Si2H6-deposited ones. Devices using quartz as substrate also show higher passivation efficiency than those using thermally oxidized silicon substrate, albeit they may exhibit inferior characteristics before passivation. Moreover, devices using thermally oxidized silicon substrate exhibit higher leakage currents after prolonged plasma treatments, due to plasma radical atoms piling up at back channel interface. Plasma passivation mechanisms are proposed to explain the above-mentioned phenomena. Device characteristics degrade with stress time for all kinds of plasma-passivated devices and stress conditions, although the degree and trend of degradation are quite different. The instability mechanisms are studied. It is shown that device degradation is mainly due to states creation in the bulk of active layer and/or at the interface of oxide/poly-Si and trapped charges in oxide. Electric field in the active device region and thermal conductivity of the substrate are shown to be the two main factors in affecting device instability. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 電漿處理 | zh_TW |
dc.subject | 低溫複晶矽薄膜電晶體 | zh_TW |
dc.subject | 可靠度 | zh_TW |
dc.subject | The Effects of Various Plasma Treatments | en_US |
dc.subject | Low-Temperature Polycrystalline Thin Film Transistors | en_US |
dc.subject | Reliability | en_US |
dc.title | 電漿處理對低溫複晶矽薄膜電晶體特性和可靠度之影響 | zh_TW |
dc.title | The Effects of Various Plasma Treatments on the Characteristics and Reliability of Low-Temperature Polycrystalline Thin Film Transistors | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |