應用於極大型積體電路金屬導線間之低介電常數材料的研究

Abstract

在極大型積體電路中當元件尺吋縮小到深次微米的領域時，元件速度將會大大地受到金屬連線間延遲的限制。為了降低訊號傳遞的時間延遲，具有低介電常數材料以及用銅金屬作為內連線(interconnect)材料將扮演一個重要的角色。因此在低介電常數材料的應用中，已有許多不同的無機或有機的聚合物(polymer)及多孔性材料相繼研發出來。本篇論文中共研究三種低介電常數材料，包括兩種新的矽氧烷類(siloxane)材料以及一種具多孔性的材料(xerogel)。內容主要針對這三種材料的特性加以探討其中包括其物性與電性的基本量測。除此之外還針對了銅金屬化對低介電常數材料的影響的研究。在沒有擴散障礙層下，這些材料經高溫熱處理後，漏電流都會大幅增加。若加上擴散障礙層，其特性都會被大大的改善。

For ULSI circuits when feature size is scaled into the deep submicron region, The speed of the devices will be significantly limited by the interconnect delay. Low dielectric constant (K) materials will play a major role, with copper as the interconnect material, in offering to minimize the interconnect RC delay. A variety of inorganic or organic polymers, xerogel are being considered for low k applications. This thesis will describe two new siloxanes and porous xerogel with ultra-low dielectric constant for low k applications. We will explore thermal stability, moisture uptake, stress variations, leakage current and electrical dielectric breakdown strength of three types of low-k materials. In this work, the application of low-k to copper metallization is also investigated. Without MoN barrier, the Cu/T23(cured at 350C)/Si MOS capacitors are very leak after 3500C anneal and the thermal stability of Cu/T24(cured at 500C)/Si MOS capacitors is found to reach 400C. For the Cu/MoN/ T24(cured at 500C)/Si MOS capacitors, the stability temperature is up to 500C.