标题: | 氢氟酸气态清洗及氮掺杂于闸极氧化层与复晶矽氧化层之应用 The Applications of In-Situ HF Vapor Cleaning and Nitrogen Incorporation for Gate Oxides and Polysilicon Oxides |
作者: | 陈建亨 Jiann Heng Chen 雷添福 赵天生 Tan Fu Lei Tien Sheng Chao 电子研究所 |
关键字: | 氢氟酸气态清洗;氮掺杂;闸极氧化层;复晶矽氧化层;HF Vapor Cleaning;Nitrogen Incorporation;Gate Oxides;Polysilicon Oxides |
公开日期: | 1999 |
摘要: | 本论文主要是研究以氢氟酸气态清洗及氮掺杂之闸极氧化层与复晶矽氧化层的特性。首先,要制作一个无自然氧化层(native-oxide-free)之表面,使用不同接触孔径(contact hole)的清洗方式来比较传统的湿式液态氢氟酸(conventional wet HF)与新式同步氢氟酸气态清洗(in-situ HF vapor cleaning)的不同。利用密集式(cluster)同步气态氢氟酸处理与同步掺杂(in-situ doped)复晶矽沉积制程可避免试片曝露在大气中,复晶矽栓塞(poly-plug)结构的源极/汲极(source/drain)之接触电阻(contact resistance)可明显下降。此外,我们并试作了一个使用超薄闸极氧化层(ultra-thin gate oxide)的深次微米n型金氧半电晶体(deep-submicron n-MOSFETs)。 这个外加的同步氢氟酸气态清洗可减少自然氧化层的再生长(re-growth)并改善晶片的表面粗糙度(surface roughness)。我们的结果显示无自然氧化层(native-oxide-free)之4 nm超薄闸极氧化层的漏电流、表面能态(interface states),n型金氧半电晶体元件的汲极电流(Id)与通道电导(Gm)、 SILC (stress-induced leakage current)与热载子(hot carrier)抵抗力都有明显改善。 我们还结合氮离子在闸极的布植(nitrogen gate electrode implantation)与同步氢氟酸气态清洗来制作使用超薄闸极氧化层的深次微米n型金氧半电晶体。结果显示4 nm超薄闸极氧化层的漏电流、Qbd(charge-to-breakdown)、表面能态(interface states),n型金氧半电晶体元件的汲极电流(Id)与通道电导(Gm)、Icp(charge pumping current)、 SILC (stress-induced leakage current)与热载子(hot carrier)抵抗力都有明显改善。这些性能与稳定度的改善主要归因于结合同步氢氟酸气态清洗与氮离子在闸极的布植所带来的无自然氧化层制程、平坦的表面、氮掺杂与在介面上较少的砷(As)掺杂。 我们提出结合N2O氮化处理(nitridation)与化学机械研磨制程 (CMP, Chemical Mechanical Polishing)的方法来成长高品质的复晶矽氧化层。并利用AFM 与 TEM观察复晶矽氧化层/复晶矽介面的粗糙与平整度,SIMS来分析磷(phosphorous)与氮(nitrogen)的纵深分布。实验结果显示,与非CMP (Non-CMP)的试片相比,在经化学机械研磨制程抛光后复晶矽表面成长的氧化层有低漏电流、高介电质崩溃电场(dielectric breakdown field)、高电子能障(electron barrier height)、低电子捕捉率(electron trapping rate)、高Qbd (charge-to-breakdown)与低捕捉电荷密度(density of trapping charge)的极佳特性。再者,化学机械研磨制程增加了N2O氮化处理时氮原子在介面间的掺杂而进一步增进了复晶矽氧化层的品质。此外,经化学机械研磨制程改善的复晶矽的表面也减少了在热成长过程中磷原子(phosphorous)的向外扩散(out-diffusion)。 更进一步的,我们也结合化学机械研磨制程与N2/N2O高温加热退火(RTA)来增进LPCVD TEOS复晶矽氧化层的特性。此法制备的TEOS复晶矽氧化层有较佳之J-E曲线、较高的Qbd (charge-to-breakdown)与低电子捕捉率(electron trapping rate)。经不同温度下N2O退火的TEOS复晶矽氧化层特性也必须研究。这种双层的结构 (TEOS 沉积与RTA热成长氧化层),让复晶矽氧化层在不同电注入(+Vg and –Vg injection) 方向,在漏电流、电子捕捉率(electron trapping rate)与Qbd (charge-to-breakdown) 方面随着温度不同而有着明显的不对称变化。 The characteristics of gate oxides and polysilicon oxides with in-situ HF vapor cleaning and nitrogen incorporation have been investigated. A native-oxide-free silicon surface is prepared. Difference contact hole treatment ways were used to compare the difference between conventional wet HF and new in-situ vapor HF process. The cluster in-situ HF vapor instead treatment and in-situ doping poly-Si deposit process was used to prevent the samples to expose the surface to the air. The contact resistance of poly-plug contact source/drain structure is reduced. Besides, a high performance and reliable deep-submicron n-MOSFETs with ultra-thin gate oxide has been demonstrated. An additional in-situ HF vapor cleaning and transferring of wafers in the closed ambient can reduce the re-growth of native oxide and improve the surface roughness. Our results also indicate that the performance, including the leakage current of ultra-thin gate oxide, the drain current (Id), and transconductance (Gm) of n-MOSFETs with 4 nm thin gate oxides are all significantly improved. The interface states, the stress-induced leakage current and the hot carrier immunity of n-MOSFETs are significantly improved for the native-oxide-free gate oxide. We demonstrate a high performance and reliable deep-submicron n-MOSFETs with ultra-thin gate oxide prepared by combining with nitrogen gate electrode implant and native-oxide-free in-situ HF vapor pre-oxidation cleaning. The performance and reliability, including the leakage current of ultra-thin gate oxide, charge-to-breakdown (Qbd), the drain current (Id), transconductance (Gm), charge pumping current (Icp), stress induce leakage current (SILC), and hot carrier reliability of n-MOSFETs with 4 nm thin gate oxides are all significantly improved. The improved reliability and performance are attributed to the native-oxide-free process, the smooth interface, the incorporation of nitrogen and less As incorporation in the gate oxide resulting from HF vapor clean and nitrogen implantation. The high quality polysilicon oxide grown combining N2O nitridation and CMP (Chemical Mechanical Polishing) process has been proposed. The surface roughness and surface morphology of polyoxide/polysilicon interface are characterized by using AFM and TEM analyses. SIMS analysis is performed to investigate depth profiles of phosphorous and nitrogen. Experimental results indicate that polyoxide grown on the CMP sample exhibits a lower leakage current, higher dielectric breakdown field, higher electron barrier height, less electron trapping rate, higher charge-to-breakdown (Qbd), and lower density of trapping charge than those of Non-CMP samples. In addition, the CMP process enhances nitrogen incorporation at the interface by the N2O nitridation, ultimately improving the polyoxide quality. Moreover, the CMP process smoothens the surface of polysilicon and this planar surface reduces the out-diffusion of the phosphorous during thermal oxidation. Furthermore, the integrity of TEOS polyoxide with CMP process and a high temperature RTA N2/N2O annealing has been studied. Polyoxides deposited by LPCVD TEOS with combination of CMP and RTA show superior performance in term of improved J-E curve, higher charge to breakdown and lower electron trapping rate. The characteristics of TEOS polyoxide annealed in N2O at different temperatures were also discussed. In addition, the surface roughness and surface morphology of polyoxide/poly-Si interface are characterized by using AFM and TEM analyses. SIMS analysis is performed to investigate depth profiles of nitrogen. Besides, with the different annealing temperature, the bilayer (TEOS deposited and thermally grown by RTA) polyoxide film introduces the asymmetry on the electrical leakage current, trapping characterization and Qbd for the different polarity (+Vg and –Vg) injection. Chapter 2 Native-Oxide-Free Surface Prepared by In-Situ HF Vapor Cleaning Chapter 3 Characteristics of Deep-Submicron n-MOSFETs by Nitrogen Implantation and In-situ HF Vapor Clean Chapter 4 Characteristics of Thermal Polysilicon Oxides by N2O Nitridation and CMP Processes Chapter 5 Characteristics of TEOS Polysilicon Oxides by CMP Process and High Temperature RTA N2/N2O Annealing Chapter 6 Conclusions and Recommendations for Future Works |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#NT880428125 http://hdl.handle.net/11536/65770 |
显示于类别: | Thesis |