标题: 针对H.264/AVC去方块滤波器及框内编码之演算法和架构设计
Algorithm and Architecture Design for H.264/AVC Deblocking Filter and Intra Coding
作者: 郑朝钟
Chao-Chung Cheng
张添烜
Tian-Sheuan Chang
电子研究所
关键字: 视讯;压缩;积体电路;video;h.264;avc;VLSI;intra;deblocking
公开日期: 2004
摘要: 数位视讯科技已在我们的日常生活中扮演重要的角色,编码效能也随着技术的演进而提升,H.264/AVC是目前最新的国际视讯编码标准,相较于MPEG-4、H.263、和MPEG-2,分别可节省39%、49%、和64%的资料量,但由于其具有相当复杂之编码技术及模式选择,使得运算复杂度也远高于先前之编码标准,因此如何设计高效能的运算模组与在不致牺牲H.264/AVC之编码效能之前提下,降低其运算复杂度,为目前相当重要之课题。本论文中,我们的贡献主要有三个部分,分别是针对H.264/AVC系统中:方块滤波器的架构设计、快速框内预测演算法、以及框内编码器之架构设计。
去方块滤波器是H.264/AVC视讯编码系统中的重要模组,用来减少方块视觉效应,以增进影像品质。占有不可忽视的运算量,本论文中,我们提出了两种不同硬体架构,藉由妥善安排资料处理的顺序,在不影响输出结果的情况下,达到更有效的资料利用率与加速处理的效能,和之前的设计相比,第一种架构有控制逻辑简单的优点,大量的减少控制电路的逻辑闸数目,并减少50%的内部记忆体,第二种架构则可以减少90%的内部记忆体,并达到更快的运算效率。
框内预测利用空间中资料数值的相关性,用来预测将被编码的资料数值,是H.264/AVC视讯编码系统中框内编码的重要利器,在本论文中,我们针对H.264/AVC框内预测提出一个简单的三步骤演算法,利用各预测模式的方向关系,省略出现机率较低之模式的运算,而整个过程,只固定需要运算六个模式,而不像全域搜寻演算法需要找九种模式。和全域搜寻法相比,约可节省约33%的框内预测运算量,而只损失约1%左右的位元率。
最后,我们提出H.264/AVC框内编码器的硬体演算法及其架构,所提出的硬体演算法省去复杂的平面预测模式,减少占整体面积最大的框内预测模组,且藉由改善的代价函数来增进压缩的效能。配合高效能的硬体架构和运算流程,可以117.28MHz下,进行即时的HDTV(1280x720) 30fps编码。
简而言之,我们对H.264/AVC视讯编解码系统的贡献主要有三个部分。我们提出的去方块滤波器架构可以更有效率的加速去方块处理;快速框内预测演算法可以有效减少预测所需的运算量;我们所提出的框内编码架构可以加快框内编码的速度。
Digital video technology has played an important role in our daily life. With the evolution of video technology coding efficiency has been greatly improved. H.264/AVC is the latest international video coding standard that can save 39%, 49%, and 64% of bit-rates in comparison with MPEG-4, H.263, and MPEG-2, respectively. However, this efficiency comes with the cost of much higher computational complexity than previous standards due to the complex coding approaches and mode decision techniques. Thus, how to design high performance functional units and reduce computational complexity without too much degradation in coding efficiency are very important topics. In this thesis, we have three contributions for the H.264/AVC design, architecture design of the deblocking filter, a fast intra prediction algorithm, and an architecture design of intra coding in H.264/AVC.
Deblocking filter is an important component of H.264/AVC to reduce the blocking effect and to improve the video quality. It is both computational and memory extensive. In this thesis, two different architecture of deblocking filter are proposed. The computing flow is reordered for efficient data reusability and high throughput while maintain standard compatibility. In the first version, gate count is greatly reduced by simple control unit, and internal memory is also reduced to 50% of that in the previous design. In the second version, the proposed architecture can reduce 90% of internal memory and achieve higher throughput than others.
Intra prediction, which uses the information of spatial correlation to prediction the data to be encoded, is an important tool of intra frame coding. In this thesis, we propose a simple fast three step algorithm. The algorithm uses the directional relationship of prediction modes to skip the modes with less probability. Thus, the proposed algorithm can complete the 4x4 intra prediction by only examining six modes instead of nine modes in the full search algorithm. The simulation result shows that the proposed algorithm can maintain similar PSNR quality to that in the full search algorithm with 33% of computation reduction of intra prediction process and only 1% of bit-rate increase.
Finally, a hardware oriented algorithm of intra coding and its architecture are proposed. We save the complex and hardware costly plane mode, which occupies the biggest area in the intra prediction unit in the intra coding and improve the coding efficiency with the enhanced cost function. With well designed high performance functional unit and computing schedule, the proposed architecture can easily support real-time intra coding of HDTV 1280x720@30fps video application when clocked at 117.28MHz.
In brief, our contribution to H.264/AVC video coding system is in three parts. The first contribution to the deblocking filter architecture can accelerate the deblocking process. The second contribution to the fast intra coding algorithm can reduce the computational complexity of intra prediction. The final contribution to the intra coding architecture can speed up the computation of intra frame coding.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009211590
http://hdl.handle.net/11536/66623
显示于类别:Thesis


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