完整後設資料紀錄
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dc.contributor.author謝文獻en_US
dc.contributor.authorWen-Shain Hsiehen_US
dc.contributor.author陳明哲en_US
dc.contributor.authorMing-Jer Chenen_US
dc.date.accessioned2014-12-12T02:25:34Z-
dc.date.available2014-12-12T02:25:34Z-
dc.date.issued2000en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#NT890428118en_US
dc.identifier.urihttp://hdl.handle.net/11536/67195-
dc.description.abstract我們藉由變換偏壓條件,以量測有關快閃記憶體寫入與抹除一系列的特性。他們主要包含了:(1)在汲極電流相對於汲極電壓的曲線中,顯示了當足夠的通道熱電子注入時,汲極電流將會變小;(2)在臨界電壓相對於寫入時間的曲線中,顯示了在夾止點的撞擊消失了;以及(3)在臨界電壓相對於抹除時間的曲線裡,可以看到在抹除時除了F - N穿遂效應之外,同時也使浮動閘極產生空乏區。為了解決後者所造成的影響, 我們以不同的軟寫入偏壓條件,找出設計方針與汲極、閘極電壓間的關係。並且在之後展示閘極和源極的干擾效應,與耦合比例的抽取技術,以及利用大量的F - N 穿遂電子,達到快速寫入的目的。zh_TW
dc.description.abstractA series of programming and erase characterizations on a flash memory cell are carried out for various bias conditions. They include primarily: (i) the drain current versus drain voltage, showing a dramatic drop in drain current at the onset of significant channel hot electron injection; (ii) threshold voltage versus programming time, showing the impact of pinch-off point disappearance; and (iii) threshold voltage versus erase time, exhibiting the situation that F - N tunneling for erase is accompanied simultaneously by generating depletion region in the floating gate. To remove the latter degradation, a soft programming scheme is built for different biases and can provide design guideline as function of drain and control gate voltage. Also performed are addressing the control gate and source disturbs effect, extracting coupling ratios, and highlighting F - N burst tunneling for fast programming.en_US
dc.language.isoen_USen_US
dc.subject快閃記憶體zh_TW
dc.subject特性zh_TW
dc.subject分析zh_TW
dc.subject參數萃取zh_TW
dc.subjectflash memoryen_US
dc.subjectcharacterizationen_US
dc.subjectanalysisen_US
dc.subjectparameter extractionen_US
dc.title快閃記憶體的特性、分析以及參數萃取zh_TW
dc.titleCharacterization, Analysis, and Parameter Extraction of Flash Memoriesen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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