閘極結構對矽在絕緣層上動態啟始電壓N型金氧半場效電晶體的影響

Abstract

在本論文中，我們研究了不同閘極結構的SOI元件分別在一般金氧半電晶體(MOSFET)操作模式以及動態啟始電壓金氧半電晶體(DTMOS)操作模式下的特性。由於動態啟始電壓的金氧半電晶體是將閘極及基體相連接，所以在操作”開態”時，則會有較低的啟始電壓，因此元件的驅動電流便可獲得大大的提昇。我們也發現了當T型閘極與H型閘極操作在動態啟始電壓金氧半電晶體的模式下時，由汲極電壓所造成的位壘下降(DIBL)可以獲得很明顯的改善。 由實驗的結果發現我們可以藉由通道寬度邊緣矽與場氧化層交界的橫截面積的減少，而使得由晶隙性矽所引起的硼隔離分散到場氧化層的效應降低，來解釋為何較薄的SOI元件能改善其反窄通道效應(RNCE)。此外，在本論文吾人也針對不同閘極結構進行反窄通道效應的研究，並發現H型閘極結構由於其”無邊”(edgeless)的結構，因此有效的抑制了反窄通道效應的發生。此外，使用H型閘極的元件，則可以因為其兩端跟基體接觸的結構，而明顯的降低了SOI元件的浮體效應(floating body effect)。

In this thesis, the characteristics of SOI devices with different gate structures under MOSFET-mode and DTMOS-mode operation are investigated. Since the gate is tied to body, the threshold voltage of devices will decrease under DTMOS-mode operation. Thus, the devices can have higher driving current for both T-gate and H-gate structures. Furthermore, DIBL is drastically reduced when devices were operated in DTMOS-mode. The experimental findings can be explained by a decrease of cross-sectional silicon/oxide interface area in the width edge as that the boron segregation into oxide due to silicon interstitials is reduced, leading to an improved RNCE in SOI devices with thinner silicon film. The H-gate device shows almost no RNCE and this is primarily due to its edgeless feature. In addition, using H-gate structure can significantly reduce the floating body effect because of the existence of two sides of substrate contact.