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dc.contributor.author高瑄苓en_US
dc.contributor.authorHsuan-ling Kaoen_US
dc.contributor.author荊鳳德en_US
dc.contributor.authorAlbert Chinen_US
dc.date.accessioned2014-12-12T02:26:29Z-
dc.date.available2014-12-12T02:26:29Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009211807en_US
dc.identifier.urihttp://hdl.handle.net/11536/67801-
dc.description.abstract由於矽射頻金氧半場效電晶體在雜訊以及高頻功率效能上已逐漸被改善,因此目前被廣泛的使用在無線通訊上。但是,在矽射頻積體電路與三五族射頻積體電路的比較之中,其在主動元件中的射頻效能仍然較低,而在被動元件中效能的大量損失和較大的雜訊,都還是矽射頻積體電路技術的主要挑戰,此外,由於射頻積體電路在阻抗匹配、低射頻雜訊以及高功率上的要求,要比數位及類比電路還要嚴苛,因此,另一個矽射頻元件的問題,是牽涉於隨後而來在電性操作造成元件射頻效能退化的真實判斷。然而,矽射頻金氧半場效電晶體的量測是相當複雜,主要是因為所量測的射頻特性有絕大部分來自於基板的寄生效應,解決此寄生效應,將可準確的判斷矽射頻金氧半場效電晶體的特性。 本論文中,我們首先採用一種新奇的微代線電路佈局方式,來得到一個真實的最小雜訊指數量測方式而無需任何的扣除嵌進過程,此種方式有效的解決了基板的寄生效應。基於此電路佈局方式,我們可以直接量測真實的最小雜訊指數,因此可以建立直流電流電壓、散射參數和最小雜訊指數的模型,同時可以預測元件在隨後的電性操作上射頻效能的退化。更進一步的,我們將射頻積體電路整合於高絕緣的塑膠基板上,此種塑膠基板的絕緣方式將有效改善被動元件中大量的射頻效能損失且有較低的成本。除此之外,由於塑膠基版是可彎曲的,因此可以將伸展的應力應用於其上,此種應力將可以改善矽射頻金氧半場效電晶體的直流及射頻效能,同時我們也利用模擬軟體的方式來驗證之。如此極好效能的射頻電晶體以及元件模型的預測,將非常適合於低雜訊超寬頻的電路應用。zh_TW
dc.description.abstractSilicon RF MOSFETs are now widely-used for wireless communications, due to improvements of their RF noise and high frequency gain performance as the technology has evolved. The major technology challenges for Si RF ICs compared with their III-V counterparts are the lower performance of the active RF transistors, and large loss and noise from the passive devices. Furthermore, the RF ICs is especially important for the tight requirements regarding impedance matching, low RF noise and high gain compared with their digital and analog counterparts. Therefore, another key issue involves accurate determination of the RF performance degradation of the Si MOSFETs under continuous operation. Besides, the RF noise is difficult to measure in Si MOSFETs due to the large noise generated from the parasitic substrate loss. To overcome the parasitic effect, the performance of the Si RF MOSFETs can be accurate determinated. In this thesis, we used a novel microstrip transmission line layout to make accurate measurements of the minimum noise figure (NFmin) without any de-embedding. Due to the accurate as-measured NFmin, a self-consistent DC I-V, S-parameters and NFmin model was developed and also predicted the RF performance degradation under continuous operation. Moreover, we integrated the Si RF ICs on highly-insulating plastic. This provides lower RF loss than the poorly isolating VLSI-standard Si substrates, and at a lower cost. In the meanwhile, plastic substrates are also flexible and can apply tensile strain. The DC-RF performances for the RF MOSFETs with microstrip line layout were improved by applying tensile strain on plastic and also confirmed by T-Supreme and Medici simulations (TMA). The excellent performance of RF transistors and device model are suitable for low-noise ultra-wide band (UWB) (3.1-10.6 GHz) applications.en_US
dc.language.isoen_USen_US
dc.subject射頻金氧半場效電晶體zh_TW
dc.subject電性效應zh_TW
dc.subject元件模型zh_TW
dc.subjectElectrical Stress Effectsen_US
dc.subjectDevice Modelingen_US
dc.subjectRF MOSFETsen_US
dc.title射頻金氧半場效電晶體之電性效應與元件模型zh_TW
dc.titleElectrical Stress Effects and Device Modeling of RF MOSFETsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis


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