矽-基底之電晶體於高頻特性的可靠度分析

Abstract

近年來，隨著無線通訊技術的快速發展以及電路成本上的降低，矽-基底之電晶體在實行系統整合於單一晶片的角色及運用也越來越趨成熟。在開發先進元件的同時，可靠度的測試和分析也將會是一個重要的議題。而傳統上直流所做的參數的可靠度測試，是否就能符合高頻電路操作下的相對安全規格？亦或是高頻電路操作下，主動元件所需考量的可靠度因素會比傳統上所做的直流測試更加嚴苛？這些考量的因素在於直流測試以及高頻測試之間的關聯性又是如何？ 本論文的研究方向和主題即是針對於這個有趣的議題在矽基底電晶體的高頻操作運用上，做一個有系統並且完整的分析。論文中，針對矽基底電晶體的部分則是包含兩大主題：矽鍺異質接面雙極性電晶體 (SiGe HBTs)、以及金氧半場效電晶體 (MOSFETs)。 傳統上，針對矽鍺異質接面雙極性電晶體的可靠度測試主要的方法可再細分為兩種：反向偏壓的射極-基極接面(Reverse-biased Emitter-Base junctions, and left collector open)，與順向偏壓集極電流(Forward-biased Collector current)，而相同的目的即是利用相對較高的電壓或是電流的驅迫(Stressing)，來產生較大的電場以及帶有較高能量的熱載子。近年來，由於矽鍺異質接面雙極性電晶體主要運用於高頻電路中的功率電路(Power Amplifier)，而在接近實際操作情況下，同時產生較高的輸出電流以及較高的輸出電壓，而這樣的偏壓條件下，也對於元件的可靠度是一個新的挑戰。而所謂的混合驅迫(Mixed-Mode Stressing)就是利用矽鍺異質接面雙極性電晶體在操作的同時給於較高的電流密度以及高電壓下所造成的一種熱載子驅迫。這個接近實際操作下的熱載子分析，也是本論中高頻可靠度分析的一項重要主軸，尤其是在高頻功率上所造成的影響。 傳統的反向偏壓射極-基極接面驅迫所造成的熱載子會在靠近基極和射極接面以及隔離基極-射極的絕緣層上產生接面陷阱(traps)和帶電荷的接面能態(interface state)，而影響其直流特性上的電性反應。譬如在基極電流上產生非理想的複合漏電流，而造成電流増益的下降。這也會影響高頻操作時某些可預期的電性上的劣化反應。在此實驗中，由於熱載子對於基極電流和集極電流所造成的影響並不一致，所以我們也針對於不同方式的電流驅動下(固定IC 和 固定IB)，完整地分析熱載子對於矽鍺異質接面雙極性電晶體實際操作上，在其高頻特性以及功率特性的影響。並以小訊號等效電路將其參數萃出作為分析比較以及尋找出高頻參數的劣化與直流特性參數劣化之間的相關性。而在混合驅迫下，熱載子對於矽鍺異質接面雙極性電晶體所造成的傷害，除了直流上的變異，高頻操作下我們則是利用大訊號(VBIC)模型，將其相關的參數萃出，並對於高頻特性、功率特性做一個完整的分析和功率放大器的模擬。並且在這實驗的過程中，我們發現在固定集極電流驅動下的矽鍺異質接面雙極性電晶體，受到熱載子傷害後，其高頻特性以及功率特性相對地較不受到影響。 另一方面，本論文也針對金氧半場效電晶體的高頻操作下的可靠度做了一個完整的分析。而本論文中，對於金氧半場效電晶體的可靠度的討論則是包含了熱載子傷害以及閘極氧化層的崩潰。其中，我們分析探討的範圍包含了高頻電路運用下的幾個主要規格，例如：截止頻率、最大震盪頻率、雜訊指數、線性度以及高頻功率。並且在實驗的過程中，我們發現一般直流劣化的參數並不足以提供和代表高頻操作下規格劣化的指標。所以在我們這完整的分析裡，我們建議高頻可靠度的模型必須重新被建立。

In recent years, with the advanced technologies in communication system, silicon-based transistors have played an important role; especially, for low-cost and highly-integration system-on-a-chip (SOC). In the development of such advanced devices, the analysis of reliability becomes the most important concern. It is a question, if the DC parameters of reliability can guarantee the reliable operation in RF circuits? Or the reliability issues should be considered more carefully in the RF parameters than those in DC parameters. As to the device reliabilities, we are curious about the interaction and the co-relation between the DC degraded parameters and the RF parameters. We examined and analyzed the interesting reliability issues on the silicon-based transistors; especially, for the high-frequency operation in this thesis. As to the topic of silicon-based transistors, we departed the main discussions into two parts: one is about silicon-germanium hetero-junction bipolar transistors, and the other one is the MOS transistors. As discussed above, reliability stressing and burn-in of bipolar transistors historically proceeds along two different paths: reverse emitter-base stress, which is used to inject hot carriers (electrons or holes) into the E-B spacer oxide, thereby introducing generation/recombination (G/R) center traps, which lead to excess non-ideal base current and hence current gain degradation. The other one is forward-current density, which is as well as EB stressing, also results in current gain degradation under a high voltage or a high current stressing. Recently, due to the popularly used for SiGe HBTs in RF power amplifiers, the biasing condition which is simultaneously applying under a high VCB voltage and a high collector current density is a new challenge to active devices. A new reliability damage mechanism which was termed as mixed-mode degradation was reported in SiGe HBTs. It results from the simultaneous application of high JC and high VCB and gets the hot carrier damage. In this thesis, we also discussed and analyzed this practical reliability mechanism in SiGe HBTs, especially for its RF power applications. Typical stressing like under the E-B reverse biasing results in some traps near the E-B spacer oxide and interface states in EB junctions. Those effects result in a non-ideal G/R base leakage current thus decrease the output current gain. Since the hot carrier damage affects the base current but remains the collector current unaffected of SiGe HBTs, we discussed the different currents (constant IC and constant IB) driving before and after stressing. In addition, by using a small-signal model, we extracted and compared the parameters before and after E-B reverse stressing. Then, we tried to find the co-relation and interaction between the DC parameter degradations and the degradations of RF figures-of-merit. As to the mixed-mode stressing, a commercial large-signal (VBIC) model is used to examine the hot carrier damage on the high frequency characteristics of SiGe HBTs. We finally found that the device of SiGe HBT is more robust to hot carrier damage on high frequency and RF power performance when it is under the driving of a constant collector current. In another part of this thesis, we discussed and analyzed the reliability issues on the high frequency characteristics of MOS transistors. The discussion and analysis of RF reliabilities in this thesis included the hot-carrier damage and the critical gate oxide breakdown of MOS transistors. In addition, the discussion covered the main specifications of high frequency applications of MOS transistors like the cutoff frequency, maximum oscillation frequency, noise figure, linearity, and RF power performance. In this experiment, we finally found that the DC reliability parameters are lack and can not fit and present the RF reliability degradations. So, a RF reliability model is urgent and suggested to be constructed, especially for the future application of RF circuits.