Design of an All-Digital LVDS Driver

doi:10.1109/TCSI.2008.2008279

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DC 欄位	值	語言
dc.contributor.author	Lu, Hungwen	en_US
dc.contributor.author	Wang, Hsin-Wen	en_US
dc.contributor.author	Su, Chauchin	en_US
dc.contributor.author	Liu, Chien-Nan Jimmy	en_US
dc.date.accessioned	2014-12-08T15:09:00Z	-
dc.date.available	2014-12-08T15:09:00Z	-
dc.date.issued	2009-08-01	en_US
dc.identifier.issn	1549-8328	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/TCSI.2008.2008279	en_US
dc.identifier.uri	http://hdl.handle.net/11536/6844	-
dc.description.abstract	This paper presents an all-digital low-voltage-differential-signaling (LVDS) driver design for Serial Advanced Technology Attachment II. A simultaneous-switching-noise reduction technique and an autocalibration mechanism are implemented to suppress switching noise and to handle process and environmental variations. The circuit is implemented in a 0.18-mu m 1P6M CMOS process with a core area of 0.072 mm(2). At 3 Gbps, it consumes 9 mW of power under a 1.8-V power supply or 3 pJ/bit.	en_US
dc.language.iso	en_US	en_US
dc.subject	Low-voltage-differential-signaling (LVDS) driver	en_US
dc.subject	simultaneous switching noise (SSN)	en_US
dc.title	Design of an All-Digital LVDS Driver	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/TCSI.2008.2008279	en_US
dc.identifier.journal	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS	en_US
dc.citation.volume	56	en_US
dc.citation.issue	8	en_US
dc.citation.spage	1635	en_US
dc.citation.epage	1644	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:000269213400002	-
dc.citation.woscount	6	-
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