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dc.contributor.author連崇安en_US
dc.contributor.authorChung-An Lienen_US
dc.contributor.author高曜煌en_US
dc.contributor.authorYao-Huang Kaoen_US
dc.date.accessioned2014-12-12T02:30:35Z-
dc.date.available2014-12-12T02:30:35Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009213589en_US
dc.identifier.urihttp://hdl.handle.net/11536/70312-
dc.description.abstract本論文旨在使用金氧半製程研究一新型兩級壓控環路振盪器及其在短距離通訊之應用。針對環路振盪器不同的電晶體堆疊層數和延遲級數之電路特性有深入的研究討論,使用具交錯耦合的兩級環路振盪器具有振幅大、抖動小及功率消耗小等優點。基於此環路振盪器利用TSMC 0.35微米金氧半製程實現一GHz鎖相迴路,且發展設計出一應用於歐規868MHz短距離無線通訊裝置之發射晶片。此發射晶片整合了壓控石英振盪器、鎖相迴路、輸出級電路,以輸出功率0dBm為目標,並具備FSK/ASK/FM調變功能,其整體電流消耗為10.5mA。zh_TW
dc.description.abstractThe purpose of this study is to investigate a novel two-stage voltage-controlled ring oscillator and its application to short range communication. Ring oscillators are analyzed in terms of transistor stack and the number of delay cells. It is confirmed that ring oscillators with two delay cells, which possess crossed-coupled pair, have the advantage of wide voltage swing, low jitter, and low power consumption. With this kind of ring oscillator as a core, a PLL operating at GHz is implemented by TSMC 0.35um CMOS technology. In the meantime, a chip for the European 868MHz short range devices (SRDs) is developed. The integrated transmitter chip, composed of a crystal oscillator, phase-locked loop and output stage, is aimed at 0dBm and featured with FSK/ASK/FM modulation. The total current consumption of the chip is 10.5mA.en_US
dc.language.isozh_TWen_US
dc.subject兩級環路振盪器zh_TW
dc.subject鎖相迴路zh_TW
dc.subject傳送器zh_TW
dc.subject短距離通訊zh_TW
dc.subjectTwo-Stage Ring Osci;;atorsen_US
dc.subjectPhase-Locked Loopen_US
dc.subjectTransmitteren_US
dc.subjectShort-Range Communcationen_US
dc.title新型環路振盪器及其在短距離通訊之應用zh_TW
dc.titleStudy on Novel Ring Oscillators for Short-Range Applicationen_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
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