5GHz適用於IEEE 802.11a 之前端發射器設計

Abstract

在本篇論文中完成了適用於IEEE 802.11a之前端發射器設計，包含了九十度相位差之直接升頻混波器以及前置放大器。本設計採用聯電0.18-μm 1P6M CMOS製程完成晶片製作，同時以矽品QFN系列完成封裝。直接晶圓探測量測結果顯示增益為0.94 dB、1-dB飽和電壓為315 mV以及最大輸出工率0 dBm。量測結果與模擬相近並符合設計要求。在封裝量測中，雜訊頻率成份壓抑可達30 dBc，載波壓抑為28dBc。由於封裝模型不盡理想以及印刷電路版非理想效應造成整體電路增益衰退。量測結果顯示增益為-14.5 dB，1-dB飽和電壓為880 mV以及最大輸出功率-6.6 dBm。

In this thesis, a direct-conversion transmitter front-end for IEEE 802.11a is designed and fabricated using UMC 0.18μm 1P6M CMOS technology. The transmitter front-end contains quadrature mixer in I, Q branches and a preamp. Both chip and package assembly had been implemented. The measurement result of the on-wafer version shows that the conversion gain is 0.94 dB, 1-dB compression voltage is 315 mV and maximum output power of 0 dBm which can meet the specification of our IEEE 802.11a system. The packaged version has the spurious suppression of at least 30 dBc and carrier suppression of 29 dBc. However, due to the PCB and imprecise package model the conversion gain is lower than expected. The conversion gain is -14.5 dB, 1-dB compression voltage is 880 mV and maximum output power is -6.6 dBm.