High-performance p-channel LTPS-TFT using HfO(2) gate dielectric and nitrogen ion implantation

Abstract

In this communication, a high-performance p-channel low-temperature poly-Si thin-film transistor with HfO(2) gate dielectric and nitrogen ion implantation is demonstrated for the first time. A low threshold voltage V(TH) = -0.8 V, excellent subthreshold swing S.S. = 0.123 V/decade, high field effect mobility mu(FE) = 64.14 cm(2) V(-1) s(-1) and high driving current I(Dsat) = 9.14 mu A mu m(-1) @ 3 V operation voltage of the p-channel LTPS-TFT can be achieved. The high performance characteristics are attributed to the very low effective oxide thickness EOT = 8.4 nm provided by the HfO(2) gate dielectric and the passivation of effective interface states and grain boundary traps by the nitrogen ion implantation treatment. It would be very suitable for the application of a high-speed and low-power pixel-driving device in flat-panel displays.