藍芽中頻數位解調分析裝置研製

Abstract

本藍芽中頻數位解調裝置，採用TI/TMS320C6711數位信號處理器，透過其強大數位運算能力，提出可程式化中頻頻寬0~10MHz，符碼率(Symbol rate) 1MHz的GFSK數位解調架構。 藍芽射頻訊號經降頻器降至中頻，ADC將類比訊號做數位化處理，再由數位解調還原成原始訊號。中頻訊號在類比前端電路放大，並將假象頻率濾除，ADC以本地自由震盪頻率32Msa/s快速對中頻訊號取樣，取樣結果儲存在FIFO記憶體內部。與本地數位自由震盪器做複數乘法，可將取樣的中頻訊號降至基頻，此基頻訊號包括同相(in-phase) I(t)及正交(quadrature) Q(t) 成分。透過符碼時序回復(Symbol timing recovery)找出每一個符碼的起始點。載波頻率回復(Carrier frequency recovery)將頻率抵補誤差(Frequency offset)移除。最後，利用頻率鑑別器還原原始訊號。 設計者，透過本裝置量測分析數位調變訊號之射頻部分的頻率偏差(Frequency Deviation)、調變資料的星座圖(Constellation diagram)及EVM(Error Vector Magnitude) ，可快速驗證，改善產品瑕疵，並加速開發時程。

A measurement module implemented with TI/TMS320C6711 Digital Signal Processors is proposed for demodulating Gaussian Frequency Shift Keying (GFSK) modulated signals with 1MHz symbol rate and accommodate wide information bandwidths of the communication signal with the frequency span as wide as 10 MHz. The measurement engine is based upon powerful digital signal processing technologies that provide it’s flexibility of programmable bandwidths and symbol rate. The incoming RF power is first down-converted to IF, digitized, and then demodulated. The IF signal input at the analog front end is amplified and alias protected. Following the analog signal conditioning, the signal undergoes analog-to-digital conversion and then is stored in a FIFO. The digital data, which is sampled at 32MSa/s with a local free-running clock, passes through a local free-running digital oscillator and a complex multiplier , and then down-convert the desired signal to the baseband including the in-phase I(t) and the quadrature component Q(t). Symbol timing recovery is achieved prior to carrier recovery. Carrier frequency offset is then estimated to remove residual offsets. The analysis of the frequency deviation, constellation and Error Vector Magnitude (EVM) are available in this device. Designers can employ them to quickly identify and quantify impairments to digitally modulated signals, which , in turn, might accelerate their product development.