標題: 802.11B頻率合成器設計
Synthesizer Design for IEEE 802.11B
作者: 楊書結
Shu-Chieh Yang
溫瓌岸
Kuei-Ann Wen
電機學院電子與光電學程
關鍵字: 802.11B;頻率合成器設計;Synthesizer Design for IEEE 802.11B;802.11B
公開日期: 2002
摘要: 在802.11B 頻率合成器中利用LC的共振結構電路是RF中最常用的組合. 一個電壓可控制LC電壓控制振盪器, 除了共振結構外還需要能夠提供在不同的802.11B頻段的可程式控制迴路, 使得輸出的頻率可以依需求變化. 為了滿足這樣的需求, 一個電壓控制振盪器可以鎖定相差的電路就相形的重要了. 在深次微米的CMOS技術中可以提供低耗電, 高電路密集度且靈敏度佳的優點. 在此篇的論文中是用UMC 0.18um (1P6M) 1.8V的製程. 完成晶片量測實際頻率變化為2.1G Hz to 3.2G 在100KHz及1MHz的相位雜訊為: -76.67 dBc@ 100KHz and -89.33dBc @ 1MHz.
The LC tank configuration is the widely used architecture for RF model in 802.11B synthesizer. An LC voltage controlled oscillator (LC-VCO) is used as the core oscillator and the programmability of the clock is also necessary in order to provide various output clock signals for different building blocks of 802.11B system. To fulfill those requirements, an LC voltage-controlled oscillator phase locked loop (LC-VCO-PLL) is used as a basic clock source. Deep-submicron CMOS technology has advantages such as low power, high density and high sensitivity. In this thesis a fully integrated frequency synthesizer, using UMC 018-um CMOS (1P6M) 1.8V process model. The VCO frequency range is from 2.1G Hz to 3.2G, and the phase noises are -76.67 dBc@ 100KHz, -89.33dBc @ 1MHz.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT911706017
http://hdl.handle.net/11536/71312
顯示於類別:畢業論文