標題: | Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms |
作者: | Huang, Pei-Yu Lee, Yu-Min 電信工程研究所 Institute of Communications Engineering |
關鍵字: | Circuit simulation;generalized integral transforms (GITs);physical design;simulation;thermal analysis;3-D IC |
公開日期: | 1-五月-2009 |
摘要: | The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns during modern IC design. This paper presents an accurate and fast analytical full-chip thermal simulator for early-stage temperature-aware chip design. By using the generalized integral transforms (GIT), an accurate formulation is derived to estimate the temperature distribution of full-chip with a truncated set of spatial bases which only needs very small truncation points. Then, we develop a fast Fourier transform like evaluating algorithm to efficiently evaluate the derived formulation. Experimental results confirm that the proposed GIT-based analyzer can achieve an order of magnitude speedup compared with a highly efficient Green's function-based thermal simulator. Finally, we propose a 3-D IC thermal simulator and demonstrate its efficiency and accuracy. |
URI: | http://dx.doi.org/10.1109/TVLSI.2008.2006043 http://hdl.handle.net/11536/7332 |
ISSN: | 1063-8210 |
DOI: | 10.1109/TVLSI.2008.2006043 |
期刊: | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Volume: | 17 |
Issue: | 5 |
起始頁: | 613 |
結束頁: | 626 |
顯示於類別: | 期刊論文 |