基於交替方向隱式插入延遲法之具線性複雜度的晶片電源網路暫態分析

Abstract

隨著晶片上電晶體密度的提昇以及電源電壓的降低，我們需要強健而穩定的電源 傳遞網路來供應晶片上的裝置運作。在設計電源傳遞網路過程中需要電源網路分 析來確定設計的品質，但隨著電源網路尺寸的增加，傳統的電路分析方法會花費 太多的時間以及記憶體，這使得電源網路分析成為一項具有挑戰性的任務。本篇 論文結合了插入延遲法(LIM)以及交替方向隱式法(ADI)，發展出了一套有效率的 電源網路暫態分析技術，稱為ADI-LIM。而為了將交替方向隱式法應用到插入延 遲法，這裡提出了一個網路分割方法，用來定義出網路中可用於交替方向隱式法 的方向。ADI-LIM 保持了插入延遲法的線性運行時間和記憶體消耗之優點，並且 放鬆了在插入延遲法中時間步階大小的限制。實驗結果顯示出ADI-LIM 比起改 良節點分析法快了約95 倍，並且有能力分析更大的電路，而比起基本的插入延 遲法也快了4.5~5 倍。

With the increasing transistor density and the lowering power supply voltage, the robust and stable power delivery network (PDN) is demanded to support devices on chip. Power grid transient analysis is necessary during the design process to ensure the quality of PDN. However, as the scale of power grid increases, the traditional circuit analysis methods often take a lot of time and huge memory requirement. Therefore, the power grid analysis becomes a challenging task. This thesis utilizes the Latency Insertion Method (LIM) and alternating direction implicit (ADI) method to develop an efficient transient simulator for power grid network. In order to apply ADI method to LIM, a network splitting procedure is proposed to define the direction of ADI in the network. The proposed method, ADI-LIM, keeps the linear runtime and memory requirement in LIM. Furthermore, it can relax the restriction on time step size. The experimental results show that our simulator is about 95 times faster than modified nodal analysis based solver, and about 4.5~5 times faster than basic LIM.