利用源極與汲極工程改善鍺通道金氧半場效電晶體之特性

Abstract

在這篇論文之中，首先，我們製作了三氧化二鋁/二氧化鍺/鍺基版之金氧半電容。三氧化二鋁是以原子層沈積所沈積，而二氧化鍺是以快速熱氧化所形成。我們探討了於300度中30分鐘的氫氣氧氣混合之熱退火對於金氧半電容之影響。我們還使用電導法來萃取金氧半電容之介面缺陷密度。此外，我們亦探討定電壓應力與電荷捕捉現象對於N鍺基版金氧半電容特性之影響。 接著，為了改善鎳鍺合金薄膜之熱穩定性，我們在鎳與鍺基版之間加入一層鉑以製作蕭特基接面。透過原子力顯微鏡與掃描電子顯微鏡，我們發現鎳鍺合金的製程容忍度的確可以透過鉑的摻雜而有效地改善。此外，此蕭特基接面在550度進行快速熱退火時，可以得到不錯的特性，包含最低的理想因子(1.064)、最高的電子蕭特基能障(0.579 eV)、最高的開關電流比(8.5104)、與最低的串聯電阻(11.11 )。因此，通道長度為5 m的鍺通道蕭特基P型金氧半場效電晶體便以550度作為形成合金的溫度。經過氫氣氮氣混合之熱退火後，在過驅動電壓為-2.4伏特及汲極電壓為-2伏特時，元件可以展現出一個相當不錯的驅動電流，亦即33.5 A/m。其驅動電流亦比採用鎳鍺合金與鉑鍺合金的元件來得高。此外，元件在次臨界擺幅方面亦有144 mV/dec的不錯的表現。 最後，我們成功在鍺覆絕緣基版上製作出有矽鍺抬高式源極與汲極的鍺通道N型金氧半場效電晶體。抬高式源極與汲極可以增加源極與汲極的接觸面積，進而降低源極與汲極的串聯電阻。跟只有鍺作為源極與汲極的元件相比，採用鍺含量為0.95的矽鍺抬高式源極與汲極的元件之驅動電流在過驅動電壓為2.8伏特及汲極電壓為2伏特時可從4.48 A/m上升到5.99 A/m，換而言之，改善的程度大約是33 %。

In this thesis, we firstly fabricated Al2O3/GeO2/Ge MOS capacitors. Al2O3 was deposited by atomic layer deposition (ALD), while GeO2 was formed by rapid thermal oxidation (RTO). The effect of forming gas annealing (FGA) at 300 °C for 30 min on MOS capacitors is investigated. Conductance method is utilized to extract the density of interface states of MOS capacitors. Besides, we discuss effect of constant voltage stress (CVS) and charge trapping behavior on N-Ge MOS capacitors. Secondly, in order to enhance the thermal stability of nickel germanide (NiGe), a thin Pt layer was deposited between Ni and N-type Ge substrate to fabricate Schottky junction. With the help of atomic force microscopy (AFM) and scanning electron microscopy (SEM), it is found that the process window of NiGe film can be indeed enlarged by Pt incorporation. Moreover, the NiGe:Pt/N-Ge junction with RTA performed at 550 °C exhibits good electrical characteristics, including the lowest ideality factor (n) of 1.064, highest Schottky barrier height for electron (bn) of 0.579 eV, highest ION/IOFF ratio of 8.5104, and lowest series resistance (rs) of 11.11 . As a result, Ge Schottky PMOSFET (LG = 5 m) with NiGe:Pt was fabricated with alloy formed at 550 °C. After FGA treatment, a high drive-current of 33.5 μA/μm at VGS-VT = -2.4 V and VDS = -2 V was obtained. The drive-current is also higher than that of Ge PMOSFETs with NiGe and Pt2Ge3 S/D. Besides, an excellent subthreshold swing of 144 mV/dec is also demonstrated. Finally, Ge channel NMOSFETs (LG = 4 m) with epitaxial GexSi1-x elevated S/D on GeOI substrate was fabricated. Elevated S/D efficiently enlarges the contact area and thus leads to lower series resistance in S/D (RSD). The drive-current at VG-VT = 2.8 V and VD = 2 V can be enhanced from 4.48 A/m for the NMOSFET with Ge S/D to 5.99 A/m for the NMOSFET with Ge0.95Si0.05 elevated S/D. In other words, approximately 33 % improvement in performance is achieved.