使用HUM技術的奈米製程先進細部繞線

Abstract

由於有非常高的複雜度，VLSI繞線通常拆成兩個階段，一個是廣域繞線而另一個是細部繞線。廣域繞線會產生一個tile對tile的繞線結果，細部繞線則會根據廣域繞線的結果來去產生實際的繞線結果。 最近，[15]提出了一個叫做HUM的繞線方法，並且這個繞線方法已經在廣域繞線中被證明雖然繞線品質稍微低了點但能夠得到比Maze繞線方法更好的效能。 這份研究就是在改善HUM繞線方法，同時將這個方法從廣域繞線中移植到細部繞線上，之後以改善後的HUM繞線方法為根基，建立一個點格式繞線的細部繞線方法。而實驗數據可以證明這份研究能夠得到比起NEMO[14]這個強大的非點格式細部繞線方法有更好的效能。並能夠在修改後的ISPD-2011-sb1測資上得到比Encounter-Wroute這個業界工具更好的效能。

Because of enormous computational complexity, VLSI routing divides into two stages, one is global routing and another is detail routing. The global routing generates the routing solution based on tile to tile and detail routing generates the actual geometry layout for each net based on the global routing result. Recently an ideally alternative routing algorithm called Hybrid Unilateral Monotonic (HUM) routing algorithm has been proposed [15], it has been proved that can achieve much better performance and little less quality as compared to maze routing algorithm in global routing. This work modified the HUM routing algorithm from global routing stage to detail routing stage and construct the grid-based detail routing kernel based on the modified HUM routing algorithm. The experiment result shows that our work can achieve better performance than the NEMO [14] the powerful grid-less detail router of our lab and compared with Encouner-Wroute the commercial tool designed by Cadence, our work also shows the better performance in the modified ISPD-2011-sb1 case.