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dc.contributor.author賴祐生en_US
dc.contributor.authorYu-Sheng Laien_US
dc.contributor.author陳茂傑en_US
dc.contributor.authorMao-Chieh Chenen_US
dc.date.accessioned2014-12-12T02:46:22Z-
dc.date.available2014-12-12T02:46:22Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT008911558en_US
dc.identifier.urihttp://hdl.handle.net/11536/76724-
dc.description.abstract本論文主要研究部分空乏型(PD) SOI金氧半電晶體元件的特性,內容包括兩部分:第一部分探討元件基體電位的量測方法,並對基體的接腳是否完全控制基體電位做一些驗證;第二部分主要探討口袋離子佈值對於元件特性的影響。由於基體浮接(FB) PD-SOI元件有面積小速度快等應用上的價值,但卻有一些基體電位不固定所造成的副作用,所以有必要藉由基體連接元件量取基體電位。 實驗結果顯示常見的“零基體電流法”在基體電位隨量測條件變化大的情況下會有一些誤差出現。 延長量測時間或是監控正負向小電流再以內插法計算出基體電位,可以得到相當準確的基體電位值。 口袋離子佈植會影響元件的臨界電壓及汲極/基體和源極/基體間的pn接面特性,造成元件特性的改變。為了降低基體浮接的效應,在實施數種不同的口袋離子佈植條件以尋求降低基體電位,並提高順向源極/基體間pn接面電流的同時,也必須避免影響元件的交直流特性。實驗結果顯示額外加入高能量、高劑量的零度角口袋離子佈植有助於提高源極/基體間的順向pn接面電流,但是卻也同時提高了汲極/基體間的逆向pn接面電流而致於拉高了基體電位。因此,吾人建議在源極/基體接面實施高劑量的零度角口袋離子佈植,而在汲極/基體接面實施較低劑量的零度角口袋離子佈植,將可降低基體浮接的效應並維持其他原有的元件特性。zh_TW
dc.description.abstractThis thesis studies device properties of partially depleted (PD) SOI nMOSFETs. The first part of the study contains the discussion and development of body potential measurement methods for the floating body (FB) PD-SOI devices, while the second part contains the investigation of the effect of pocket implant on the device properties. The FB PD-SOI devices feature small area and high speed, but their unfixed body potential results in some operational uncertainty. By employing the commonly used null-body-current method to measure the body potential (VB), we found that inaccurate data of VB are easily obtained whenever there is a large value of differential body potential with respect to the change of drain voltage (dVB/dVD). Accurate body potential can be obtained by prolonging the measurement time or with the aid of interpolation to the monitored small positive/negative small body current. Pocket implant will affect many device characteristics, including threshold voltage and drain-to-body and body-to-source junction properties. To reduce floating body effect by reducing body potential, it is helpful to increase the forward junction current at the source-to-body junction. To achieve the goal of reducing body potential without affecting all other device characteristics, we propose the pocket implant scheme as follows, based on the results of our experimental study. In the first place, we may somewhat reduce the implantation dose for the conventional well and the tilt-angle pocket implant. Then, an additional zero-degree pocket implant with appropriate implantation conditions is performed only at the source-to-body junction to enhance its forward junction current, while another additional zero-degree pocket implant with a lower dose (than the previous one at the source-to-body junction) is performed only at the drain-to-body junction so as to restrain its reverse junction current and junction capacitance.en_US
dc.language.isoen_USen_US
dc.subject基體電位zh_TW
dc.subject空乏型SOI金氧半電晶體zh_TW
dc.subject口袋離子佈植zh_TW
dc.subject逆向pn接面電流zh_TW
dc.subjectPD-SOIen_US
dc.subjectFB PD-SOIen_US
dc.subjectbody potentialen_US
dc.subjectPocket implanten_US
dc.title部分空乏型SOI元件之基體電位的量測及口袋離子佈植效應之探討zh_TW
dc.titleBody Potential Measurement Methods and Pocket Implant Effect on PD-SOI Devicesen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis