新型閘極覆蓋輕摻雜汲極複晶矽薄膜電晶體之製作與研究

Abstract

本論文中，我們成功製作了一個具有閘極覆蓋輕摻雜汲極的複晶矽薄膜電晶體。我們提出了新穎的簡易製作方式，不需要額外的光罩、也不需要任何活性離子非等向性蝕刻技術，同時輕摻雜汲極的長度可以利用控制濕式蝕刻的時間輕易從100nm變化到600nm。比起傳統的閘極覆蓋輕摻雜汲極結構，我們的方法可以避免間隙壁製作過程中的電漿損害、可以製作較長的輕摻雜汲極長度以有效降低元件的漏電，同時是一個低成本的製作流程，可以被簡單的應用。

和對照組的標準元件相比較，我們的結構確實降低了漏電，也有效抑制了元件的短通道效應，這表示我們的結構確實可以有效降低汲極電場。另外我們也發現，我們所提出的結構也可以有效提升導通電流，我們認為這可能是因為元件的閘極覆蓋輕摻雜汲極區域的載子濃度提升、寄生電阻下降，所以和傳統元件相較，可以有效提升導通電流。為了驗證，我們也量測不同通道長度的標準元件和新穎元件的線性區導通電阻，做圖萃取他們的寄生電阻，結果發現確實標準元件的寄生電阻是新穎元件的五倍以上。

最後，我們也比較了新穎元件和標準元件的可靠度，利用典型的熱載子劣化分析，發現確實如預期的，所提出的新穎元件在可靠度測試後的劣化程度較標準元件的輕微很多，這也驗證了所提出的元件確實具有可以實際應用的價值。

In this thesis, we had demonstrated a novel gate-overlapped lightly doped drain (GOLD) poly-Si TFT. Without any spacer fabrication, additional mask definition or RIE etch back processing, an effective GOLD TFT can be fabricated successfully and easily. The LDD length ranging from 100nm to 600nm can be controlled by simply arranging different wet etching time. Compared to control standard samples, the proposed devices have larger turn-on current, smaller leakage current and better short channel effect immunity such as suppressed threshold voltage roll-off effect. These improved performances prove that the proposed structure had effectively reduced the drain side electric field. The enhanced turn-on current of proposed devices is found to be caused by reduced parasitic resistance. A plausible reason is that the gate-overlapped lightly doped region enhances the carrier density and therefore increases the driving current.

To obviously compare the parasitic resistance effect, we extract the parasitic resistance of standard devices and proposed devices by analyzing the linear region turn-on resistance for devices with various channel length. It is found that the parasitic resistance of standard devices is indeed 5 times larger than that of the proposed GOLD devices.

Finally, we also examine the reliability of the proposed devices. With typical hot carrier stress for 3000 sec. The standard devices exhibit serious degradation such as increased leakage current, larger subthreshold swing and lower turn-on current. The proposed devices, comparing with the standard device under the same stress condition, have much superior immunity for this hot carrier degradation. As a conclusion, the proposed GOLD devices have not only simply fabrication process but also good output performance for channel length ranging from 10 um to 3um.