標題: 完全空乏型單晶矽在絕緣層上之短通道金氧半場效電晶體的二維分析及新解析模式
2–D Analysis and New Analytical Models for Fully–Depleted SOI Short–Channel MOSFETs
作者: 王漢邦
張國明
電子研究所
關鍵字: 金氧半場效電晶體;二維分析;完全空乏型單晶矽;大傾角佈植;SOI;MOSFET;FD;Halo implant
公開日期: 2004
摘要: 本論文針對完全空乏型之單晶矽/二氧化矽金氧半場效電晶體建立了臨界電壓、汲極電流之解析模型。此外,並對於結合大傾角佈植(Halo or Pocket Implantation)製程之短通道完全空乏型單晶矽/二氧化矽金氧半場效電晶體,依序建立其電位分佈、臨界電壓以及次臨界電流之解析模式。另外,本文亦推導一適用於高頻積體電路之金氧半場效電晶體小信號模型及一正確的參數萃取方法。在二維數值分析以及相關實驗之測試下,所提出的解析模式之有效性已經成功地被驗證。 第一章包含有關於我們研究動機的概括論述及介紹本論文的組織架構。在第二章中,我們利用三區域格林函數解法(Three–Zone Green’s Function Solution Method)於二維帕松方程式(Poisson’s Equation),且根據適當的邊界條件選取合適的格林函數,精確地解出位於前/後閘二氧化矽以及單晶矽內的二維電位分佈。我們藉由在前閘二氧化矽與單晶矽介面間應用高斯定律(Gauss’s Law)來定義臨界電壓。在推導出的二維電位分佈函數之基礎下,我們提出了一新方法用以避免傳統欲求得最小表面電場位置時,可能需要的重複運算以及時間耗費。我們將使用垂直平均電場來替代前二氧化矽/單晶矽介面間最小表面電場,並由此來定義臨界電壓。但是,這將會忽略了來自源極及汲極接面的側向電場侵入。因此,我們將引入一具有物理意義之修正因子以彌補此一可能產生的錯誤,並且提升此解析模型之準確性。經由二維數值分析比較之後,證實此模式可準確地預測完全空乏型之單晶矽/二氧化矽金氧半場效電晶體在各種不同結構及外加偏壓下之臨界電壓。 在第三章中,我們將前一章所得之臨界電壓模式對於汲極電壓加以線性化,置入線性區域之電流–電壓解析模式中,以考慮汲極導引位障降低(Drain–Induced Barrier Lowering, DIBL)效應。此外,並將溫度提昇模型一併考慮在內。接著,在飽和區域之電流–電壓解析模式中包含了汲極飽和電壓模式以及通道長度調變模式(Channel Length Modulation, CLM)。再者,次臨界區域電流–電壓解析模式也涵蓋在內。其中,寄生電阻、溫度、撞擊離子化及寄生雙載子電晶體等效應皆內含於所提出之電流–電壓解析模式中。經由實驗結果分析比較之後,發現所得到的解析模式可以準確地估算完全空乏型之單晶矽/二氧化矽金氧半場效電晶體在各種不同外加偏壓下電流–電壓關係。 在第四章中,我們將探討具有大傾角佈植結構之短通道完全空乏型單晶矽/二氧化矽金氧半場效電晶體,並建立其電位分佈、臨界電壓以及次臨界電流之解析模式。首先,我們應用三階連續函數於二維帕松方程式,配合適當的邊界條件,解出單晶矽內部的二維電位分佈,並進而推得前閘二氧化矽與單晶矽介面處之電位分佈。接著,藉由求出最低表面電位,進而導出臨界電壓解析模式。此外,配合漂移–擴散電流方程式,我們推導出次臨界電流之解析模型。所提出的解析模式經由與二維數值模擬比較結果顯示,我們發現: 當通道長度縮減到0.06微米時,解析模式也能獲得令人滿意的結果。 第五章提出了一個適用於高頻電路方面應用之金氧半場效電晶體小信號模型及其相關參數之萃取方法。此小信號模型考慮了閘極區域內呈現連續分佈之閘極電阻、基板電阻網路及不可互逆的電容。在適當的假設及邊界條件之下,配合閘極區域之傳輸線方程式,即可求得位於閘極區域之電流及電壓關係式。接著,配合二埠電路模型,我們求得等效電路之Y參數。此外,以所求得之Y參數與頻率之關係為基礎,我們發展出一套準確的電路參數萃取方法。此參數萃取方法已成功地應用在實驗數據的參數取得上,我們發現其所萃取出的參數仍具有相當的物理意義。此外,將所萃取得之參數置入小信號模型中,經由計算結果與實驗數據比較分析後,我們得知: 即使當操作頻率提昇至10 G赫茲時,此小信號模型仍可準確預測電晶體之高頻特性。 第六章中,在為了能夠同時萃取得金氧半場效電晶體交流及直流參數的動機之下,我們提出了一個參數萃取方法: 除了萃取得交流參數之外,藉由使用S參數量測方法來萃取金氧半場效電晶體之元件參數。所萃取的參數包含了臨界電壓、寄生串聯電阻、有效之載子遷移率以及元件尺寸相關參數。此參數萃取方法已成功地應用於實驗數據上,經由實驗數據以及模擬計算結果的分析比較之後,我們得知此一參數萃取方法提供了極佳的準確性。 第七章將本論文的重要貢獻做一整理回顧,並展望值得延伸探討的研究方向。
ABSTRACT The analytical models for the threshold voltage and drain current of short–channel fully–depleted SOI MOSFETs have been developed in this thesis. Additionally, new analytical models of potential distribution, threshold voltage and subthreshold current of short–channel fully–depleted SOI MOSFETs with halo and pocket implants have also been proposed. Moreover, a new small–signal model of MOSFETs and the relevant parameter extraction method are presented for high frequency applications. Based on the numerical analysis and experimental results, the validities of the developed analytical models are successfully verified. This thesis is consisted of seven chapters. In Chapter 1, the potential advantages of SOI MOSFETs are globally discussed and the organization of the thesis is given. In Chapter 2, a three–zone Green’s function solution method is proposed to analytically model the potential distributions in the front/bottom oxide and silicon regions of the fully–depleted SOI MOSFETs. The exact solution of 2–D Poisson’s equation is obtained by means of the Green’s theorem, in which the Green’s function solutions are determined according to the appropriate boundary conditions. The threshold voltage is defined by applying the Gauss’s Law to the surface of the silicon film. Based on the derived 2–D potential distribution, a new approach of approximating the normal electric field at the location of minimum surface potential with the average electric filed is proposed to avoid the iterations in solving the position of the minimum surface potential. In the development of the analytical threshold voltage model, a modified factor accounting for the lateral electric encroachment from the drain junction is further introduced to compensate the error resulted from the above approximation. Comparisons between the developed analytical threshold voltage model and the 2D numerical analysis are presented. It is shown that good agreements are achieved for wide range of device structure parameters and applied biases. In Chapter 3, a new analytical model for I–V characteristics of fully–depleted SOI MOSFETs is proposed, in which an analytical threshold voltage model considering the drain–induced barrier–lowering (DIBL) effect and a temperature raise model are incorporated. The DIBL factor, which is obtained by linearizing the threshold voltage model derived in the Chapter 2, is then incorporated into the I–V model in the linear region. In the saturation region of the I–V model, a quasi–2D saturation model, which includes a source–drain saturation voltage model and a channel length modulation model is presented. Furthermore, the effects of the parasitic series resistances, temperature raise, impact ionization and parasitic bipolar junction transistor are included in the developed I–V model. It is shown that good agreements are obtained between the experimental data and the simulation results. In Chapter 4, new analytical models of subthreshold surface potential, threshold voltage and subthreshold current for the fully–depleted SOI MOSFETs with halo or pocket implants are developed. By using the cubic series function method, the 2–D Poisson’s equation for the fully–depleted SOI MOSFETs with halo implants is solved with the proper boundary conditions. Then, the subthreshold surface potential model is consequentially derived. Further, the threshold voltage model is defined by the minimum surface potential. Moreover, with the aids of the drift–diffusion current equation, the analytical subthreshold current model is derived. These derived analytical models have been compared with the 2–D numerical analysis and excellent agreements are obtained, which validates the accuracy of the models. In Chapter 5, a new small–signal MOSFET model and a relevant parameter extraction method are proposed for RF IC applications. The small–signal model considers the distributed gate resistances, substrate network and the nonreciprocal capacitance. With the suitable assumptions and boundary conditions, the transmission line equation along the gate region is solved. Then, by applying the two–port circuit model, the Y–parameters of the small signal circuit are obtained. An extraction method for the relevant parameters of the small signal model is presented in detail. The extraction method has been applied to the experimental data and the extracted parameters show good physical meanings. Furthermore, with the extracted parameters, the derived Y–parameters are in a good agreement with the experimental data for the frequency up to 10 GHz, which shows the validity of the developed small signal MOSFET model and the parameter extraction method. In Chapter 6, an efficient method using S–parameters measurement is proposed for the extractions of the threshold voltage, parasitic series resistances, effective mobility and geometric dimensions of the MOSFETs. The proposed method provides the simultaneous extractions of the AC– and DC–related parameters. The method has been applied to the experimental data for a wide range of geometries, and a good agreement is obtained between the experimental data and the simulation results. Chapter 7 summarizes the conclusions of this thesis, in which the major contributions as well as the suggested future researches are given.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT008911804
http://hdl.handle.net/11536/76824
顯示於類別:畢業論文


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