標題: | 高介電係數介電質在金氧金電容之研究 The Investigation of Metal-Insulator-Metal Capacitor Using High-k as Dielectrics |
作者: | 江國誠 Kuo-Cheng Chiang 荊鳳德 Albert Chin 電子研究所 |
關鍵字: | 金氧金;高介電;電容;混和訊號;類比;高頻;動態記憶體;高功函數;MIM;High-k;Capacitor;Mixed-signal;analog;RF;DRAM;High work function |
公開日期: | 2006 |
摘要: | 在各種不同的被動元件中,金氧金電容經常被廣泛的應用在電路裡的去耦合、阻抗匹配與直流濾波器中﹔而且它們通常佔據了很大比例的電路面積。此外金氧金電容也是發展高密度動態記憶體中面臨的重要挑戰。記憶體電容是決定檢測訊號電壓、速度還有防止軟件誤差影響資料保存時間和耐久性的重要參數。而根據國際半導體技術藍圖制定會(ITRS),為了元件尺寸縮微和節省成本,金氧金電容的面積必須不斷的減少。
因為減低電容的厚度會增加不必要的漏電流以及惡化電容變化係數,所以使用高介電常數的介電層是唯一的解決方法。此外技術的趨勢在於發展同一種高介電材料應用於類比、射頻和動態記憶體嵌入式系統單晶片。所以高介電材料應用在金氧金電容從氮氧化矽 (k~4-7)、氧化鋁(k=10)、氧化鉿 (k~22)、氧化鉭 (k~25) 一直發展到氧化鈮 (k~40)。但是目前在這些材料中還無法同時達到在高電容密度下金氧金電容所需要的特性,例如低電壓和低電容變化係數。因此在這裡,我們發展出新的製程和超高介電係數的材料來改進金氧金電容,例如氧化鈦和氧化鉭的混合物、氧化鈦和氧化鉿的混合物(k~45-50)與鈦酸鍶(k~50-300) 。為了進一步改善這些介電質低能隙的缺點,應用高功函數鎳或銥的上電極可得到較佳的特性。如此在有限的熱預算下,不只高電容密度和低漏電還有低電容變化係數都可以同時實現。
除了基本的漏電流與低頻量測以外,我們另外量測了射頻電容的高頻散射參數。並運用數學模擬軟體,淬取出元件在不同頻率所具有的電容大小。除此我們還深入研究電容的傳導機制與電容變化跟電壓和溫度相關的成因,一些重要的因素如介電質跟電極間的介面層、能障、和表面粗糙度還有相關材料特性都在這篇論文中有透徹的討論,相信這對發展高特性金氧金電容會有很大的幫助。 Among various passive devices, metal-insulator-metal(MIM) capacitors are widely used for decoupling, impedance matching and direct current (DC) filtering; they occupy a large fraction of circuit area. Moreover, one of the most critical challenges which gigabit density DRAM’s face will be MIM memory cell capacitance. Memory cell capacitance is the crucial parameter which determines the sensing signal voltage, sensing speed, data retention times and endurance against the soft error event. According to International Technology Roadmap for Semiconductors (ITRS), continuous down-scaling of the size of MIM capacitors is required to reduce chip size and the cost. To meet these requirements high dielectric constant (k) materials provide the only solution, since decreasing the dielectric thickness to increase the capacitance density degrades both the leakage current and dC/C performance. Furthermore, it is also desirable to use the same high-k □ dielectric to meet all the Analog, RF and DRAM functions for embedded SoC. Therefore the high-k dielectrics used in MIM capacitors have evolved from SiON (k~4-7), Al2O3 (k=10), HfO2 (k~22), Ta2O5 (k~25) to Nb2O5 (k~40). However, the demonstration of MIM with these films is yet able to achieve properties such as nondispersive, good linearity and high breakdown with low leakage concomitantly, at high unit capacitance. Hence, we have developed novel process and very high-k materials, such as TiTaO, TiHfO (k~45-50) and STO (k~50-300) to advance this technology. To further improve small bandgap (Eg) in these dielectrics, a high work-function Ir or Ni (5.2 eV) electrode is used to give better performance. Therefore, not only high capacitance density, and low leakage current, but also small voltage- and temperature- dependence of capacitance are achieved under limited thermal budget for back-end integration. In addition to the measurements of leakage current density and capacitance at low frequency, we also measured the S-parameters to investigate the characteristics of the MIM capacitors at RF regime. Using the simulation software, the capacitance of the device at different frequencies was extracted. Moreover, understandings of the mechanism of conductivity, voltage- and temperature-dependence of capacitance were studied, which are also useful in the development of advanced MIM devices. The related factors, such as barrier height, surface roughness, interfacial layer, and dielectric material properties should be concerned for improving MIM performance, which were also investigated in this thesis. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009311809 http://hdl.handle.net/11536/78173 |
顯示於類別: | 畢業論文 |
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