具有基體偏壓之低雜訊放大器及整合型多相位濾波器之1-V 2.4-GHz低中頻架構前端接收器電路設計

Abstract

此論文提出一個能操作在1-V電源電壓，射頻頻率為2.4-GHz之低中頻架構之前端接收器電路，所完成的晶片是一個適用於電池供電的通訊器或藍芽無線傳輸的應用。目的是能夠實現一個簡單，低成本，低電壓，低功率消耗，且能有最少的額外元件，而能夠很容易的使用在可攜式裝備上。 這個晶片的製作是透過國家晶片系統設計中心，以台灣積體電路製造股份有限公司提供的0.25-um 互補式金氧半導體製程技術實現。整個晶片包含一個基體偏壓型低雜訊放大器，正交壓控振盪器，降頻混波器及一個主動型多相位濾波器。 量測結果顯示，接收器可以正確的操作在 1-V電源電壓。它並能提供 15-dB 增益，17-dB的雜訊指數，41-dB的鏡像拒斥比，-15-dBm輸入三階截點值。在1-V電源電壓下有18.575mW的功率消耗。

This thesis proposed a design of 1-V 2.4-GHz low-IF architecture receiver front-end circuit. It is suitable for battery-based communication equipments or bluetooth application. The goal of this design is to realize a simple, low cost, low voltage, low power consumption and with fewer external components receiver architecture and it can be easy to use for portable equipments. This chip was fabricated using 0.25-um CMOS technology provided by Taiwan semiconductor manufacturing company via national chip implementation center. Whole chip includes a body-biased low noise amplifier, quadrature voltage control oscillator, downconvert mixer and an active polyphase filter. The measured results show that the receiver can be correctly operated at 1-V power supply. The receiver provides gain 15-dB, 17-dB noise figure, 41-dB image rejection ratio, and -15-dBm input third intercept point. The power dissipation is 18.575mW with 1-V power supply.