無線通訊中涵蓋跨層級多節點之媒體擷取控制層的 軟硬體協同設計平台

Abstract

本論文研製之由於在一個無線通訊的系統晶片驗證是不可或缺的工作，但在無線通訊裡必須考慮非本身的因素而導致不能早期達到理想的驗證成果，尤其是在系統晶片設計的高度複雜性與產品推入市場的時間壓力下，如何在驗證流程的早期做到完善的驗證是個關鍵。在這篇論文裡使用了結合多項功能的系統層級設計工具，它提供軟硬體共同設計、系統架構分析、共同驗證，以此為基礎來把層級推向更高於系統層級的方向來建構符合無線通訊系統的環境，將可在早期驗證流程中提供一個能銜接資源管理和接取技術控制演算法與系統效能分析之間關係更精確與方便的模擬平台。

A procedure is for SoC verification process in wireless communication system. The most concern in wireless communication system is interactive between base stations and mobile stations. In other words, this is not enough for SoC verification to verify a single base station or mobile station, especially under the pressure of time-to-market and design complexity. Therefore, how to verify the interactive of wireless communication system fast and completely in the early process of design flow is the key point. This paper introduces an ESL tool, including HW/SW co-design, system architecture exploit, and co-simulation/verification, to establish a cross-layer multi-node environment for verifying the interactive and analyzing the system performance. The fundamental design concept is a system level design abstraction, so it can conveniently provide precise analysis results of a system performance in the early process of design flow.