標題: 原子層沉積高介電係數氧化鋁閘極介電層之鍺金氧半場效電晶體電物性研究
Electrical and physical characterization of Ge-MOSFETs with atomic-layer-deposited Al2O3 high-κ gate dielectric
作者: 劉峻丞
Jun-Cheng Liu
張俊彥
Chun-Yen Chang
電子研究所
關鍵字: 原子層沉積;氧化鋁;鍺金氧半場效電晶體;atomic layer deposition (ALD);aluminum oxide;Ge MOSFET
公開日期: 2007
摘要: 我們已經利用原子層沉積技術 ( Atomic layer depositon, ALD ) 成功地製作出了以鍺為基版的金氧半場效電晶體;並且,透過電容結構 ( Pt / ALD Al2O3 / p-type Ge / Al gate stacks ) 電物性的研究分析,我們對於製作過程中鍺揮發的機制有了相當地了解。在我們所使用的原子層沉積系統裡,選擇三甲基鋁和水為金屬源和氧化劑。氧化鋁是一個相當有潛力的氧化物,它擁有和二氧化矽相當類似的特性以及大於二氧化矽約2.5倍的介電係數。我們藉由寫下的一條與反應物表面覆蓋程度和表面錯合物反應機率相關的式子模擬了一套原子層沉積系統可達到的成長速率。這條式子,對於我們實驗結果裡相對於已經發表的數據有較高的成長速率以及較高的最高速率沉積溫度做了合理的解釋。除了鍺揮發機制,我們也研究出了原子層沉積薄膜裡殘留物和捕捉缺陷 ( trap ) 以及氧化層固定電荷 ( fixed oxide charge ) 種類之間的相對關係。我們將會呈現前後一致有關於應用兩種理論□ 雙頻 ( High-Low frequency, HLF ) 以及電導 ( Conductance, G-V ) □所得到的介面態位密度 ( interface state density ) 計算結果。經由這些在鍺電容結構電物性上的研究分析結果,我們發現一個不需任何後續熱處理和事前表面鈍化也可以在鍺基板上沉積少量鍺嵌入 ( Ge-incorporated ) 以及近乎當量化原子層沉積薄膜的溫度窗口 ( 大約在140 ~ 170 □C之間 )。 最後,我們陳列這些關於鍺基板金氧半場效電晶體的基本電性量測和指標參數粹取結果。高源集極串聯電阻、高介面態位密度、高摻雜物流失、和高接面漏電流是當處理這樣棘手基板時會遇到的主要議題。經由這些所粹取的指標性參數,在縮短通道長度的同時,我們看到了短通道效應 ( short channel effect, SCE ) 和反向短通道效應 ( reverse short channel effect, SCE )。壓軸出現的是鍺基板上等效載子遷移率 ( effective mobility, meff ) 以及場效載子遷移率 ( field effect mobility, mEF ) 與矽基板電晶體的宇宙曲線 ( universal curve ) 比較結果。
We had succeeded in fabricating a Ge p-MOSFET with Al2O3 high-k gate dielectric deposited by an atomic layer deposition (ALD) system and figured out the whole story about the mechanism of Ge out-diffusion through the studies of Pt / ALD Al2O3 / p-type Ge / Al gate stacks by physical and electrical analyses in this research. In this ALD system, tri-methyl-aluminum (TMA), Al(CH3)3, and H2O were chosen as the metal source and oxidant. Al2O3 is a very promising material shows similar properties and about 2.5 times dielectric constant of SiO2. We wrote down an equation consists of surface coverage of the reactants and probability of formation of the TMA- and H2O-related surface complexes to simulate the growth rate of an ALD system. By use of this equation, we explained reasonably the somewhat higher growth rate and highest growth rate temperature (THGR) in comparison to that reported in literatures. Beside the mechanism of Ge out-diffusion, we also studied out the relationship between the residues and the type of the trap or the fixed oxide charge in an ALD film. We would show the consistent results of calculation of interface state density by two theories □ High-Low frequency (HLF) and Conductance (G-V) methods. Through the studies of physical and electrical characteristics of the Ge-MOSCAPs, we found a window of temperature (about 140 ~ 170 □C) to deposit a less Ge-incorporated and almost stoichiometric ALD film on Ge without any post thermal treatment and prior surface passivation. Finally, we showed those measurements of essential electrical performance and extraction of indicative parameters of the Ge p-MOSFETs. High source drain series resistance, interface state density, dopant lost, and junction leakage are the major issues when deal with such a nasty substrate. From the extracted parameters, we saw the short channel effect (SCE) and reverse short channel effect (RSCE) while decreasing the channel length. Effective mobility (□eff) and Field effect mobility (□EF) would also present in comparison to the universal curve related to Si-based transistors at last.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009411567
http://hdl.handle.net/11536/80480
Appears in Collections:Thesis


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