光通訊接收端轉阻放大器之設計與製作

Abstract

對於光纖系統而言，在訊號輸入端由檢光二極體元件和靜電放電防護電路所造成的電容負載效應是光接收轉阻放大器設計上所面臨的最主要問題，其對頻寬與雜訊等重要接收性能有關鍵性的影響。為求解決此問題，我們同時採用自我補償架構與負阻抗補償技術，前者著重於降低輸入端之電容負載效應，後者則透過控制輸出端之阻抗特性來提高放大器之電壓增益，進而降低其等效輸入阻抗而達到改善頻寬的目的，除此之外，設計上再搭配適當的頻寬延伸技術，包含直流位準偏移技術與電感補償技術，可以進一步的提昇電路效能。藉由0.18微米CMOS製程與寄生電容約0.72pF的檢光二極體實現一個5Gb/s的光接收轉阻放大器，所量測到的結果顯示，當加入0.5pF寄生電容的靜電防護電路時，使用1.8伏特供應電壓的轉阻放大器靈敏度只從-17.6dBm下降至-17.2dBm，頻寬也只從3GHz下降至2.7GHz，驗證了此設計可達到高輸入電容容忍度。在10Gb/s的轉阻放大器設計中，透過雙級差動式架構來提升放大器之電壓增益與供應電源雜訊的抵抗能力，設計上也採用直流位準偏移與電感補償等技術來提升頻寬。最後，藉由90奈米CMOS製程與寄生電容約0.15pF的檢光二極體實現一個10Gb/s的光接收轉阻放大器，量測結果顯示，使用1.2伏特供應電壓的轉阻放大器具有62dBΩ的增益、8GHz的頻寬與-16.3dBm的靈敏度。

The input capacitances due to the photodiode and the ESD protection circuit cause serious degradation on both the receiver bandwidth and the sensitivity in optical receiver. To solve this problem, we combine the self-compensated architecture and the NIC technology. The former significantly reduces the loading effect caused by the input capacitances, and the latter effectively increases the voltage gain of the amplifier by controlling the output impedance of the amplifier. Moreover, the design combined with appropriate bandwidth enhancement techniques, including shunt peaking and DC offset voltage technique, can boost the performance. A 5Gb/s transimpedance amplifier is implemented by 0.18um CMOS technology at 1.8V with 0.72pF photodiode capacitance. Due to the 0.5pF ESD protection circuit, the measurement results show slightly degraded sensitivity from -17.6dBm to -17.2dBm. The bandwidth is also slightly degraded from 3GHz to 2.7GHz. A 10Gb/s transimpedance amplifier is implemented by 90nm CMOS technology at 1.2V with 0.15pF photodiode capacitance, we use a two-stage differential architecture to increase the voltage gain and improve power noise rejection. Shunt peaking and DC offset voltage technique is also employed to enhance BW. The measurement results show that the gain of TIA is 62dBΩ, -3dB bandwidth is 8GHz and sensitivity of -16.3dBm.