标题: | 可调式频宽/增益之四通道生理讯号撷取晶片设计 Tunable BW/Gain Circuit Design of Four-Channel Bio-Signal Acquisition |
作者: | 戴毓廷 林进灯 电控工程研究所 |
关键字: | 生理讯号;脑电图;电流平衡式仪表放大器;切换式电容低通滤波器;可程式化增益放大器;Biomedical signal;electroencephalogram (EEG);current-balancing instrumentation amplifier (CBIA);switched-capacitor low-pass filter (SCLPF);programmable gain amplifier (PGA) |
公开日期: | 2007 |
摘要: | 在人体所有的生理讯号中,其讯号振幅皆非常微弱,亦容易被受测者本身、量测环境及设备等因素所影响,故本论文提出适用于各种电生理讯号撷取之晶片设计。除了一般着重的低功率、低杂讯之外,同时提高共模讯号拒斥比(CMRR)与电源涟波拒斥比(PSRR),并将整体多通道前端电路整合实现在单一晶片上,不需要任何外接元件,除了兼具成本与晶片面积效益,亦可降低因复杂的接线对生理讯号在量测时所造成的干扰,使后端处理及分析的讯号品质能够更为精确。另外,在系统加入了数位控制介面,根据不同生理讯号的需求,利用数位讯号去控制选择所要的讯号放大倍率与系统频宽。 本论文所设计的生理讯号撷取晶片包含:电流平衡式仪表放大器(CBIA)、类比多工器、切换式电容低通滤波器(SCLPF)、非重叠时脉产生器(Non-Overlapping Clock Generator)及可程式增益放大器(PGA)等电路。整个电路设计使用TSMC 0.18μm CMOS 1P6M 制程技术来实现,而整体晶片面积为0.823×0.953 。由模拟结果显示,在频率150Hz下,可获得CMRR 135dB、PSRR+ 105dB,和PSRR- 112dB的效能。在操作电压 0.75V下,总消耗功率约112.68μA,平均每一通道消耗功率约28.17μA。 Due to properties of low-amplitude and non-stationary, most of biomedical signals are easily influenced by examined persons, measured environment, and electronic devices. A novel analog circuit design is proposed in this thesis, which is suitable for various biomedical signal acquisitions. In addition to the consideration of low power and low noise, the multi-channel analog front-end integrated circuit (AFEIC) is designed with high common-mode rejection ratio (CMRR) and high power supply ratio (PSRR). This circuit is realized into a single chip without any external component. It can not only reduce the number of outer components, but also enhance a better signal-to-noise ratio enormously. In addition, to select system gain and bandwidth corresponding to different amplitude and frequency of biomedical signals, the controllable digital interface was also designed and integrated into AFEIC. In this thesis, AFEIC design is composed of four current-balancing instrumentation amplifiers (CBIA), one analog multiplexer, one switched-capacitor low-pass filter (SCLPF), one non-overlapping clock generator, and one programmable gain amplifier (PGA). These circuits have been integrated into a single chip of the total area of 0.823×0.953mm2 by using TSMC 0.18μm COMS Mixed-Signal RF General purpose MiM Al 1P6M 1.8&3.3V process. For the simulation results, the proposed chip can achieve 135dB of CMRR, 105dB of PSRR+, and 112dB of PSRR- at 50Hz. The total power consumption is about 112.68□W under □0.75V supply, and the power consumption is about 28.17□W per channel. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009412636 http://hdl.handle.net/11536/80759 |
显示于类别: | Thesis |
文件中的档案:
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.