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dc.contributor.author洪士程en_US
dc.contributor.authorHorng Shih-Chengen_US
dc.contributor.author林心宇en_US
dc.contributor.authorLin Shin-Yeuen_US
dc.date.accessioned2014-12-12T03:04:34Z-
dc.date.available2014-12-12T03:04:34Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009012805en_US
dc.identifier.urihttp://hdl.handle.net/11536/80925-
dc.description.abstract在本論文中,我們提出兩個關於晶圓製造及測試程序的產能與良率之問題及解決方法。第一個問題為離子植入機的錯誤偵測與隔離,第二個問題為如何在可容忍的重測範圍內降低晶圓誤宰。要偵測一個複雜系統中的錯誤,由於缺少適當的模型,所以是一個困難的任務;正因如此,這也是讓資料採礦技術具有吸引力的地方。對於離子植入機,我們提出了一個以分類為基礎的錯誤偵測與隔離方法。所提出的方法包含了兩部分:分類部分以及錯誤偵測與隔離部分。在分類部分,我們提出具有學習能力的混合型分類樹,針對離子植入機裡正在運作晶圓的配方進行分類,所得到的k-交疊相互驗證錯誤率則用來作為分類結果的準確性。在錯誤偵測與隔離部分,則提出一個基於分類結果準確性,決定是否產生警報信號的標準,而錯誤隔離的機制則是依據混合型分類樹來隔離離子植入機的真正錯誤。我們將所提出的分類器與現有的分類軟體以實例進行比較,並測試所提出的錯誤偵測與分離方法的正確性,皆獲得很成功的結果。 降低晶圓測試程序中的誤宰與重測可以形成一個具有巨大決定變數空間 的隨機模擬最佳化問題,針對此問題我們提出一個以序的最佳化方法為基礎的兩層次演算法,來求解一個足夠好的解。在第一層次,對於所考慮的問題透過類神經網路建立一個粗略但有效率的模型。這個粗略的模型被用來在基因演算法中當做適應函數的計算工具,用以有效的從 中挑選出 個表現較佳的解。在第二層次,從挑選出來的 個表現較佳的解,繼續以現有之序的最佳化搜尋方法來找出一個足夠好的解。並且利用模擬的方式來證明所得到解的優質性。我們將所提出的方法應用在降低晶圓測試程序中的誤宰與重測問題,這是一個由測試程序中門限值向量所組成,含有巨大決定變數空間的隨機模擬最佳化問題。經由提出的演法算所得到足夠好的門限值向量,在解的優質性與計算效率上都非常成功。zh_TW
dc.description.abstractIn this dissertation, we present two related issues on the throughput and yield of wafer fabrication and testing processes. The first issue is a fault detection and isolation problem of the ion implanter, and the second is a reducing overkills under a tolerable retest level problem in wafer testing process. To detect the fault of a complex manufacturing system is a difficult task because of the lack of proper model; indeed, this is the key that makes the data mining technique attractive. We propose a classification based fault detection and isolation scheme for the ion implanter. The proposed scheme consists of two parts: the classification part and the fault detection and isolation part. In the classification part, we propose a Hybrid Classification Tree (HCT) with learning capability to classify the recipe of a working wafer in the ion implanter, and a k-fold cross validation error is treated as the accuracy of the classification result. In the fault detection and isolation part, we propose a warning signal generation criteria based on the classification accuracy to detect and fault isolation scheme based on the HCT to isolate the actual fault of an ion implanter. We have compared the proposed classifier with the existing classification software and tested the validity of the proposed fault detection and isolation scheme for real cases and obtain successful results. Reducing the overkills and retests in a wafer testing process can be formulated as a stochastic simulation optimization problem with huge decision-variable space . For this problem, we have proposed an ordinal optimization theory based two-level algorithm to solve for a good enough solution. In the first-level, we construct a crude but efficient model for the considered problem based on an artificial neural network. This crude model will then be used as a fitness function evaluation tool in a genetic algorithm to efficiently select roughly good solutions from . In the second-level, starting from the selected roughly good solutions we proceed with the existing ordinal optimization searching procedures to search a good enough solution of the considered problem. We have justified the quality of the obtained solution using simulations. We applied the proposed algorithm to the reduction of overkills and retests in a wafer testing problem, which is formulated as a stochastic simulation optimization problem that consists of a huge decision-variable space formed by the vector of threshold values in the wafer testing process. The vector of good enough threshold values obtained by the proposed algorithm is very successful in the aspects of solution quality and computational efficiency.en_US
dc.language.isoen_USen_US
dc.subject錯誤偵測zh_TW
dc.subject錯誤隔離zh_TW
dc.subject離子植入機zh_TW
dc.subject晶圓測試zh_TW
dc.subject誤宰zh_TW
dc.subject重測zh_TW
dc.subjectFault detectionen_US
dc.subjectFault isolationen_US
dc.subjectIon implanateren_US
dc.subjectWafter tesingen_US
dc.subjectOverkillen_US
dc.subjectRetesten_US
dc.title兩個關於晶圓製造及測試程序的產能與良率之問題及解決方法zh_TW
dc.titleTwo Related Issues on the Throughput and Yield of Wafer Fabrication and Testing Processesen_US
dc.typeThesisen_US
dc.contributor.department電控工程研究所zh_TW
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