標題: | Design of low-voltage CMOS low-noise amplifier with image-rejection function |
作者: | Wei, L. -S. Wu, H. -I. Jou, C. F. 電信工程研究所 Institute of Communications Engineering |
公開日期: | 31-七月-2008 |
摘要: | A new design is presented that combines a low-noise amplifier (LNA) with an on-chip. lter instead of external. lter to eliminate image signal based on TSMC 0.18 mu m CMOS technology. The fully integrated 5.9 GHz LNA exhibits 15.2 dB gain, 3.2 dB noise figure, better than -15 dB input and output return loss, and -27 dB image rejection. The circuit operates at a supply voltage of 1 V and consumes only 6.1 mW power. |
URI: | http://dx.doi.org/10.1049/el:20081246 http://hdl.handle.net/11536/8549 |
ISSN: | 0013-5194 |
DOI: | 10.1049/el:20081246 |
期刊: | ELECTRONICS LETTERS |
Volume: | 44 |
Issue: | 16 |
起始頁: | 977 |
結束頁: | 978 |
顯示於類別: | 期刊論文 |