標題: High-speed divide-by-4/5 prescalers with merged and gates using gainp/gaas hbt and sige hbt technolmes
作者: Wei, Hung-Ju
Meng, Chinchun
Chang, YuWen
Lin, Yi-Chen
Huan, Guo-Wei
電信工程研究所
Institute of Communications Engineering
關鍵字: heterojunction bipolar transistor (HBT);GalnP/GaAs;SiGe;dual-modulus;divide-by-4/5;prescaler;emitter-couple logic (ECL)
公開日期: 1-六月-2008
摘要: This paper demonstrates the divide-by-4/5 prescalers with merged AND gates in 2-mu m GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35-mu m SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (f(T)), the maxinnun operating frequency of a D-type flip-flop can be promoted. At the supply, voltage of 5 the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1-8 GHz at the cost of power consumption. (c) 2008 Wiley Periodicals, Inc.
URI: http://dx.doi.org/10.1002/mop.23407
http://hdl.handle.net/11536/8792
ISSN: 0895-2477
DOI: 10.1002/mop.23407
期刊: MICROWAVE AND OPTICAL TECHNOLOGY LETTERS
Volume: 50
Issue: 6
起始頁: 1498
結束頁: 1500
顯示於類別:期刊論文


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