標題: A Novel Array-Based Test Methodology for Local Process Variation Monitoring
作者: Luo, Tseng-Chin
Chao, Mango C. -T.
Wu, Michael Shien-Yang
Li, Kuo-Tsai
Hsia, Chin C.
Tseng, Huan-Chi
Fisher, Philip A.
Huang, Chuen-Uan
Chang, Yuan-Yao
Pan, Samuel C.
Young, Konrad K. -L.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Automatic test equipment;measurement techniques;mismatch;process variation;test structures;test structure design;transistor array
公開日期: 1-May-2011
摘要: As process technologies continually advance, local process variation has greatly increased and gradually become one of the most critical factors for integrated circuit manufacturing. To monitor local process variation, a large number of devices-under-test (DUTs) in close proximity must be measured. In this paper, we present a novel array-based test structure to characterize local process variation with limited area overhead. The proposed test structure can guarantee high measurement accuracy by application of the test techniques proposed in this paper: hardware IR compensation, voltage bias elevation, and leakage-current cancelation. Furthermore, the DUT layout need not be modified for the proposed test structure. Thus, the measured variation exactly reflects the reality in the manufacturing environment. The measured results from the few most advanced process-technology nodes demonstrate the effectiveness and efficiency of the proposed test structure in quantifying local process variation.
URI: http://dx.doi.org/10.1109/TSM.2010.2095891
http://hdl.handle.net/11536/8940
ISSN: 0894-6507
DOI: 10.1109/TSM.2010.2095891
期刊: IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
Volume: 24
Issue: 2
起始頁: 280
結束頁: 293
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