| 標題: | 先進電子設計自動化技術研發---子計畫VI：用於奈米晶片系統設計之功率意識高階合成研究(I) Study on Power-Aware High-Level Synthesis Techniques for Nenometer SOC Design(I) |
| 作者: | 董蘭榮 Dung Lan-Rong 國立交通大學電機與控制工程學系 |
| 公開日期: | 2003 |
| 官方說明文件#: | NSC92-2220-E009-033 |
| URI: | http://hdl.handle.net/11536/91734 https://www.grb.gov.tw/search/planDetail?id=890049&docId=170369 |
| Appears in Collections: | Research Plans |
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