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Title: 對以智財單元為基系統晶片設計之驗證測試與診斷技術開發研究---子計畫I：系統晶片之軟硬體共驗證技術
Study on System-on-Chip Hardware-Software Co-Verification Techniques
Authors: 董蘭榮
Dung Lan-Rong
國立交通大學電機與控制工程學系
Issue Date: 2003
Gov't Doc #: NSC92-2220-E009-003
URI: http://hdl.handle.net/11536/92081
https://www.grb.gov.tw/search/planDetail?id=844245&docId=159989
Appears in Collections:Research Plans


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