| Title: | 極大型積體電路之深次微米元件及多層連線分析及模擬的研究(II) Characterization and Modeling Techniques of Deep-Submicrometer Devices and Multi-Layer Interconnection for ULSI Circuits (II) |
| Authors: | 吳慶源 交通大學電子工程系 |
| Keywords: | 極大型積體電路;多層連線;深次微米;模型建立;可靠度;金氧半場效電晶體;快閃式記憶體;ULSI;Multi-layer interconnection;Deep submicrometer;Modeling;Reliability;MOSFET;Flash memory |
| Issue Date: | 1999 |
| Gov't Doc #: | NSC88-2215-E009-039 |
| URI: | http://hdl.handle.net/11536/94341 https://www.grb.gov.tw/search/planDetail?id=418058&docId=74157 |
| Appears in Collections: | Research Plans |
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