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dc.contributor.author吳慶源en_US
dc.date.accessioned2014-12-13T10:37:02Z-
dc.date.available2014-12-13T10:37:02Z-
dc.date.issued1999en_US
dc.identifier.govdocNSC88-2215-E009-039zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/94341-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=418058&docId=74157en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject極大型積體電路zh_TW
dc.subject多層連線zh_TW
dc.subject深次微米zh_TW
dc.subject模型建立zh_TW
dc.subject可靠度zh_TW
dc.subject金氧半場效電晶體zh_TW
dc.subject快閃式記憶體zh_TW
dc.subjectULSIen_US
dc.subjectMulti-layer interconnectionen_US
dc.subjectDeep submicrometeren_US
dc.subjectModelingen_US
dc.subjectReliabilityen_US
dc.subjectMOSFETen_US
dc.subjectFlash memoryen_US
dc.title極大型積體電路之深次微米元件及多層連線分析及模擬的研究(II)zh_TW
dc.titleCharacterization and Modeling Techniques of Deep-Submicrometer Devices and Multi-Layer Interconnection for ULSI Circuits (II)en_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程系zh_TW
顯示於類別:研究計畫


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