完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 吳慶源 | en_US |
dc.date.accessioned | 2014-12-13T10:37:02Z | - |
dc.date.available | 2014-12-13T10:37:02Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.govdoc | NSC88-2215-E009-039 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/94341 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=418058&docId=74157 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 極大型積體電路 | zh_TW |
dc.subject | 多層連線 | zh_TW |
dc.subject | 深次微米 | zh_TW |
dc.subject | 模型建立 | zh_TW |
dc.subject | 可靠度 | zh_TW |
dc.subject | 金氧半場效電晶體 | zh_TW |
dc.subject | 快閃式記憶體 | zh_TW |
dc.subject | ULSI | en_US |
dc.subject | Multi-layer interconnection | en_US |
dc.subject | Deep submicrometer | en_US |
dc.subject | Modeling | en_US |
dc.subject | Reliability | en_US |
dc.subject | MOSFET | en_US |
dc.subject | Flash memory | en_US |
dc.title | 極大型積體電路之深次微米元件及多層連線分析及模擬的研究(II) | zh_TW |
dc.title | Characterization and Modeling Techniques of Deep-Submicrometer Devices and Multi-Layer Interconnection for ULSI Circuits (II) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 交通大學電子工程系 | zh_TW |
顯示於類別: | 研究計畫 |