高密度電子構裝接合與測試載具之開發---總計畫(III)

Full metadata record

DC Field	Value	Language
dc.contributor.author	邱碧秀	en_US
dc.contributor.author	CHIOU BI-SHIOU	en_US
dc.date.accessioned	2014-12-13T10:37:08Z	-
dc.date.available	2014-12-13T10:37:08Z	-
dc.date.issued	1999	en_US
dc.identifier.govdoc	NSC88-2216-E009-011	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/94408	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=429228&docId=76835	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	電子封裝	zh_TW
dc.subject	多晶片模組	zh_TW
dc.subject	多層連線結構	zh_TW
dc.subject	基板製造	zh_TW
dc.subject	晶片接合	zh_TW
dc.subject	Electronic package	en_US
dc.subject	Multichip model (MCM)	en_US
dc.subject	Multilayer interconnection structure	en_US
dc.subject	Substrate fabrication	en_US
dc.subject	Chip interconnection	en_US
dc.title	高密度電子構裝接合與測試載具之開發---總計畫(III)	zh_TW
dc.title	A Development of Bonding Technology and Test Vehicle for High-Density Electronic Packaging (III)	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
Appears in Collections:	Research Plans

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