深次微米CMOS元件之複晶矽介電層與閘極氧化層之技術開發

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	雷添福	en_US
dc.contributor.author	LEI TAN-FU	en_US
dc.date.accessioned	2014-12-13T10:37:13Z	-
dc.date.available	2014-12-13T10:37:13Z	-
dc.date.issued	1999	en_US
dc.identifier.govdoc	NSC88-2215-E009-045	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/94461	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=444190&docId=80439	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	深次微米	zh_TW
dc.subject	複晶矽	zh_TW
dc.subject	介電層	zh_TW
dc.subject	閘極氧化層	zh_TW
dc.subject	互補式金氧半導體	zh_TW
dc.subject	Deep submicron	en_US
dc.subject	Polysilicon	en_US
dc.subject	Dielectric layer	en_US
dc.subject	Gate oxide	en_US
dc.subject	CMOS	en_US
dc.title	深次微米CMOS元件之複晶矽介電層與閘極氧化層之技術開發	zh_TW
dc.title	Technology Development on Polysilicon Dielectric Layers and Gate Oxides for Deep Submicron CMOS Devices	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
顯示於類別：	研究計畫