Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 周景揚 | en_US |
| dc.contributor.author | JOU JING-YANG | en_US |
| dc.date.accessioned | 2014-12-13T10:38:44Z | - |
| dc.date.available | 2014-12-13T10:38:44Z | - |
| dc.date.issued | 1996 | en_US |
| dc.identifier.govdoc | NSC85-2512-S009-009-EE | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/95629 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=222946&docId=39947 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 超大型積體電路測試與可測試性設計課程發展---子計畫一：總論，組合 | zh_TW |
| dc.title | "VLSI Testing and Design for Testability"Course Development | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學電子工程研究所 | zh_TW |
| Appears in Collections: | Research Plans | |
