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dc.contributor.authorChen, Jung-Shengen_US
dc.contributor.authorKer, Ming-Douen_US
dc.date.accessioned2014-12-08T15:12:29Z-
dc.date.available2014-12-08T15:12:29Z-
dc.date.issued2008-03-01en_US
dc.identifier.issn0916-8524en_US
dc.identifier.urihttp://dx.doi.org/10.1093/ietele/e91-c.3.378en_US
dc.identifier.urihttp://hdl.handle.net/11536/9593-
dc.description.abstractThe MOS switch with bootstrapped technique is widely used in low-voltage switched-capacitor circuit. The switched-capacitor circuit with the bootstrapped technique could be a dangerous design approach in the nano-scale CMOS process due to the gate-oxide transient overstress. The impact of gate-oxide transient overstress on MOS switch in switched-capacitor circuit is investigated in this work with the sample-and-hold amplifier (SHA) in a 130-nm CMOS process. After overstress on the MOS switch of SHA with unity-gain buffer, the circuit performances in time domain and frequency domain are measured to verify the impact of gate-oxide reliability on circuit performances. The oxide breakdown on switch device degrades the circuit performance of bootstrapped switch technique.en_US
dc.language.isoen_USen_US
dc.subjectgate-oxide reliabilityen_US
dc.subjectsample-and-hold amplifieren_US
dc.subjectdielectric breakdownen_US
dc.subjectbootstrapped switchen_US
dc.subjectswitched-capacitor circuiten_US
dc.titleCircuit performance degradation of switched-capacitor circuit with bootstrapped technique due to gate-oxide overstress in a 130-nm CMOS processen_US
dc.typeArticleen_US
dc.identifier.doi10.1093/ietele/e91-c.3.378en_US
dc.identifier.journalIEICE TRANSACTIONS ON ELECTRONICSen_US
dc.citation.volumeE91Cen_US
dc.citation.issue3en_US
dc.citation.spage378en_US
dc.citation.epage384en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000254605600017-
dc.citation.woscount0-
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