標題: | The impact of N-drift implant on ESD robustness of high-voltage NMOS with embedded SCR structure in 40-V CMOS process |
作者: | Chang, Wei-Jen Ker, Ming-Dou Lai, Tai-Xiang Tang, Tien-Hao Su, Kuan-Cheng 電機學院 College of Electrical and Computer Engineering |
公開日期: | 2007 |
摘要: | The ESD robustness on different device structures and layout parameters of high-voltage (HV) NMOS has been investigated in 40-V CMOS process with silicon verification. It was demonstrated, that a specific structure of HV n-type silicon controlled rectifier (HVNSCR) embedded into HV NMOS without N-drift implant in the drain region has the best ESD robustness. Moreover, due to the different current distributions in HV NMOS and HVNSCR, the trends of the TLP-measured It2 under different spacings from the drain diffusion to polygate are different. |
URI: | http://hdl.handle.net/11536/9690 |
ISBN: | 978-1-4244-1014-9 |
期刊: | IPFA 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS |
起始頁: | 249 |
結束頁: | 252 |
Appears in Collections: | Conferences Paper |