| 標題: | Investigation of anomalous inversion C-V characteristics for long-channel MOSFETs with leaky dielectrics: Mechanisms and reconstruction |
| 作者: | Lee, Wei Su, Pin Su, Ke-Wei Chiang, Chung-Shi Liu, Sally 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| 關鍵字: | capacitance-voltage (C-V);intrinsic input resistance;metal-oxide-emiconductor (MOS) capacitance;MOSFET;ultrathin gate oxide |
| 公開日期: | 1-二月-2008 |
| 摘要: | This paper investigates anomalous inversion capacitance-voltage (C-V) attenuation for MOSFETs with leaky dielectrics. We propose to reconstruct the inversion C-V characteristic based on long-channel MOSFETs using the concept of intrinsic input resistance (R-ii). The concept of R-ii has been validated by segmented BSIM4/SPICE simulation. Our reconstructed C-V characteristics show poly-depletion effects, which are not visible in the two-frequency three-element method and agree well with the North Carolina State University-CVC simulation results. The intrinsic input resistance dominates the overall gate-current-induced debiasing effect (similar to 95% for L = 20 mu m) and can be extracted directly from the I-V characteristics. Due to its simplicity, our proposed R-ii approach may provide an option for regular process monitoring purposes. |
| URI: | http://dx.doi.org/10.1109/TSM.2007.914374 http://hdl.handle.net/11536/9747 |
| ISSN: | 0894-6507 |
| DOI: | 10.1109/TSM.2007.914374 |
| 期刊: | IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING |
| Volume: | 21 |
| Issue: | 1 |
| 起始頁: | 104 |
| 結束頁: | 109 |
| 顯示於類別: | 期刊論文 |

