異質通道元件在邏輯電路及記憶體應用之適用性評估

Abstract

在本計畫中，我們針對以鍺、三五族材料作為通道的邏輯以及記憶體電路做廣泛且 深入的研究。我們將探討及比較幾種以鍺和三五族元件為基礎的組合(例如:鍺通道的 NFET 和PFET，以及鍺通道的PFET 和三五族通道的NFET)在電路方面的應用。此外， 我們將對於以鍺和三五族的超薄絕緣矽金氧半場效電晶體/鰭狀場效電晶體為基礎的邏 輯電路在漏電-延遲(Leakage-Delay)特性方面做更為詳盡的研究；當中包含了靜態邏輯、 動態邏輯、閂鎖器(latch)，以及溫度對於漏電流/效能等的影響。鍺和三五族通道材料的 超薄絕緣矽金氧半場效電晶體/鰭狀場效電晶體為基礎的靜態隨機存取記憶體的穩定度 以及效能也都將被一併研究；其中包含了讀取靜態雜訊邊界、寫入靜態雜訊邊界、讀取 時間、寫入時間、記憶體單元漏電以及元件本質變異造成的變異度。除此之外，元件晶 格轉向(surface orientation)對於以鍺和三五族通道材料鰭狀場效電晶體為基礎的邏輯和 記憶體電路在穩度定、效能以及變異度方面的影響也都將被探討。透過本研究，我們將 針對以鍺和三五族通道材料的超薄絕緣矽金氧半場效電晶體/鰭狀場效電晶體為基礎的 邏輯和記憶體電路在優點、限制、取捨和價值方面提供詳盡的分析。

In this project we conduct a comprehensive assessment of Ge and III-V channel based logic circuits and memories. Emerging device structures such as Ultra-Thin-Body (UTB) and FinFET devices are used in this study for the Ge and III-V channel based logic and SRAM applications. Different scenarios of Ge and III-V channel device combinations (eg., Ge for NFET and PFET, or Ge for PFET and III-V for NFET) for circuit applications will be analyzed and compared. Leakage-Delay properties of Ge and III-V UTB/FinFET logic circuits will be comprehensively analyzed including static logic, dynamic logic, latches and the impact of temperature on the leakage/performance, etc.. The stability and performance of Ge and III-V UTB/FinFET SRAMs will be investigated including Read Static Noise Margin, Write Static Noise Margin, Read Access time, Time to Write, cell leakage and intrinsic process variation induced variability. The impact of surface orientation on the stability, performance and variability of Ge and III-V FinFET logic circuits and SRAM cells will be examined. Our investigation will provide an in-depth understanding of the advantages, constraints, trade-off and merits of Ge and III-V channel UTB/FinFET devices for logic and memory applications.